SBOS223G December   2001  – August 2016 OPA690

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS = ±5 V
    6. 7.6 Electrical Characteristics: VS = 5 V
    7. 7.7 Typical Characteristics
      1. 7.7.1 Typical Characteristics: VS = ±5 V
      2. 7.7.2 Typical Characteristics: 5 V
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Wideband Voltage-Feedback Operation
      2. 8.3.2 Bandwidth Versus Gain: Noninverting Operation
      3. 8.3.3 Inverting Amplifier Operation
      4. 8.3.4 Output Current and Voltage
      5. 8.3.5 Driving Capacitive Loads
      6. 8.3.6 Distortion Performance
      7. 8.3.7 Noise Performance
      8. 8.3.8 DC Accuracy and Offset Control
    4. 8.4 Device Functional Modes
      1. 8.4.1 Disable Operation
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Optimizing Resistor Values
      2. 9.1.2 Thermal Analysis
    2. 9.2 Typical Applications
      1. 9.2.1 Single-Supply ADC Interface
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Single-Supply Active Filters
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Application Curve
      3. 9.2.3 High-Performance DAC Transimpedance Amplifier
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
      4. 9.2.4 High-Power Line Driver
        1. 9.2.4.1 Design Requirements
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Input and ESD Protection
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Macromodels and Applications Support
      2. 12.1.2 Demonstration Fixtures
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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11 Layout

11.1 Layout Guidelines

Achieving optimum performance with a high-frequency amplifier like the OPA690 requires careful attention to board layout parasitics and external component types. Recommendations that optimize performance include:

  1. Minimize parasitic capacitance to any AC ground for all of the signal I/O pins. Parasitic capacitance on the output and inverting input pins can cause instability: on the noninverting input, it can react with the source impedance to cause unintentional bandlimiting. To reduce unwanted capacitance, a window around the signal I/O pins must be opened in all of the ground and power planes around those pins. Otherwise, ground and power planes must be unbroken elsewhere on the board.
  2. Minimize the distance (< 0.25") from the power-supply pins to high-frequency 0.1-µF decoupling capacitors. At the device pins, the ground and power-plane layout must not be in close proximity to the signal I/O pins. Avoid narrow power and ground traces to minimize inductance between the pins and the decoupling capacitors. The power-supply connections must always be decoupled with these capacitors. An optional supply decoupling capacitor (0.1-µF) across the two power supplies (for bipolar operation) improve 2nd-harmonic distortion performance. Larger (2.2-µF to 6.8-µF) decoupling capacitors, effective at lower frequencies, must also be used on the main supply pins. These may be placed somewhat farther from the device and may be shared among several devices in the same area of the PCB.
  3. Careful selection and placement of external components preserve the high-frequency performance of the OPA690. Resistors must be a very low reactance type. Surface-mount resistors work best and allow a tighter overall layout. Metal film or carbon composition axially-leaded resistors can also provide good high-frequency performance. Again, keep their leads and PCB traces as short as possible. Never use wirewound type resistors in a high-frequency application. Because the output pin and inverting input pin are the most sensitive to parasitic capacitance, always position the feedback and series output resistor, if any, as close as possible to the output pin. Other network components, such as noninverting input termination resistors, must also be placed close to the package. Where double-side component mounting is allowed, place the feedback resistor directly under the package on the other side of the board between the output and inverting input pins. Even with a low parasitic capacitance shunting the external resistors, excessively high resistor values can create significant time constants that can degrade performance. Good axial metal film or surface-mount resistors have approximately 0.2 pF in shunt with the resistor. For resistor values > 1.5 kΩ, this parasitic capacitance can add a pole or zero below 500 MHz that can affect circuit operation. Keep resistor values as low as possible consistent with load driving considerations. The 402-Ω feedback is a good starting point for design. A 25-Ω feedback resistor, rather than a direct short, is suggested for the unity-gain follower application. This effectively isolates the inverting input capacitance from the output pin that would otherwise cause an additional peaking in the gain of 1 frequency response.
  4. Connections to other wideband devices on the board may be made with short, direct traces or through onboard transmission lines. For short connections, consider the trace and the input to the next device as a lumped capacitive load. Relatively wide traces (50 mils or 1.27 mm to 100 mils or 2.54 mm) must be used, preferably with ground and power planes opened up around them. Estimate the total capacitive load and set RS from the plot of Recommended RS vs Capacitive Load (Figure 15 for ±5 V and Figure 30 for 5 V). Low parasitic capacitive loads (< 5 pF) may not require an RS because the OPA690 is nominally compensated to operate with a 2-pF parasitic load. Higher parasitic capacitive loads without an RS are allowed as the signal gain increases (increasing the unloaded phase margin). If a long trace is required, and the 6-dB signal loss intrinsic to a doubly-terminated transmission line is acceptable, implement a matched impedance transmission line using microstrip or stripline techniques (consult an ECL design handbook for microstrip and stripline layout techniques). A 50-Ω environment is normally not necessary on board, and in fact, a higher impedance environment improves distortion as shown in the distortion versus load plots. With a characteristic board trace impedance defined (based on board material and trace dimensions), a matching series resistor into the trace from the output of the OPA690 is used as well as a terminating shunt resistor at the input of the destination device. Remember also that the terminating impedance is the parallel combination of the shunt resistor and the input impedance of the destination device; this total effective impedance must be set to match the trace impedance. The high output voltage and current capability of the OPA690 allows multiple destination devices to be handled as separate transmission lines, each with their own series and shunt terminations. If the 6-dB attenuation of a doubly-terminated transmission line is unacceptable, a long trace can be series-terminated at the source end only. Treat the trace as a capacitive load in this case and set the series resistor value as shown in the plot of Recommended RS vs Capacitive Load (Figure 15 for ±5 V and Figure 30 for 5 V). This does not preserve signal integrity as well as a doubly-terminated line. If the input impedance of the destination device is low, there is some signal attenuation due to the voltage divider formed by the series output into the terminating impedance.
  5. Socketing a high-speed part like the OPA690 is not recommended. The additional lead length and pin-to-pin capacitance introduced by the socket can create an extremely troublesome parasitic network which can make it almost impossible to achieve a smooth, stable frequency response. Best results are obtained by soldering the OPA690 onto the board.

11.1.1 Input and ESD Protection

The OPA690 is built using a very high-speed complementary bipolar process. The internal junction breakdown voltages are relatively low for these very small geometry devices. These breakdowns are reflected in the Absolute Maximum Ratings. All device pins are protected with internal ESD protection diodes to the power supplies, as shown in Figure 51.

OPA690 ai_esd_bos223.gif Figure 51. Internal ESD Protection

These diodes provide moderate protection to input overdrive voltages above the supplies as well. The protection diodes can typically support 30-mA continuous current. Where higher currents are possible (for example, in systems with ±15-V supply parts driving into the OPA690), current-limiting series resistors must be added into the two inputs. Keep these resistor values as low as possible, because high values degrade both noise performance and frequency response.

11.2 Layout Example

OPA690 SBOS223_Layout.gif Figure 52. OPA690 Layout