ZHCSUK5I December   2001  – February 2024 OPA656

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Electrical Characteristics: High Grade DC Specifications
    7. 6.7 Typical Characteristics: VS = ±5 V
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Feature Description
      1. 7.2.1 Input and ESD Protection
    3. 7.3 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Wideband, Noninverting Operation
      2. 8.1.2 Wideband, Inverting Gain Operation
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Demonstration Fixtures
        2. 8.4.1.2 Thermal Considerations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 文档支持
      1. 9.1.1 相关文档
    2. 9.2 接收文档更新通知
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 静电放电警告
    6. 9.6 术语表
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

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8.4.1.2 Thermal Considerations

The OPA656 does not require a heat sink or airflow in most applications. The following section describes how the maximum allowed junction temperature sets the maximum allowed internal power dissipation. Do not allow the maximum junction temperature to exceed 150°C.

The operating junction temperature (TJ) is given by TA + PD × RθJA. The total internal power dissipation (PD) is the sum of quiescent power (PDQ), and additional power dissipated in the output stage (PDL) to deliver load power. Quiescent power is the specified no-load supply current times the total supply voltage across the device. The PDL depends on the required output signal and load, but for a grounded resistive load, PDL is at a maximum when the output is fixed at a voltage equal to 1/2 of either supply voltage (for balanced, bipolar supplies). Under this condition, PDL = VS2 / (4 × RL), where RL includes feedback network loading.

Be aware that the power in the output stage, and not into the load, determines internal power dissipation.

As a worst-case example, compute the maximum TJ using an OPA656N (SOT23-5 package) in the circuit of Figure 8-1 operating at the maximum specified ambient temperature of 85°C and driving a grounded 100-Ω load.

Equation 4. PD = 10 V × 16.8 mA + 52 / (4 × (100 Ω || 800 Ω)) = 238 mW
Equation 5. Maximum TJ = 85°C + (0.238 W × 154°C/W) = 121.6°C.

All actual applications operate at a lower internal power and junction temperature.