ZHCSUK5I December   2001  – February 2024 OPA656

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Electrical Characteristics: High Grade DC Specifications
    7. 6.7 Typical Characteristics: VS = ±5 V
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Feature Description
      1. 7.2.1 Input and ESD Protection
    3. 7.3 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Wideband, Noninverting Operation
      2. 8.1.2 Wideband, Inverting Gain Operation
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Demonstration Fixtures
        2. 8.4.1.2 Thermal Considerations
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 文档支持
      1. 9.1.1 相关文档
    2. 9.2 接收文档更新通知
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 静电放电警告
    6. 9.6 术语表
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

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订购信息

Power Supply Recommendations

The OPA656 is intended to operate on supplies ranging from 8 V to 12 V. The OPA656 supports single-supply, split, balanced, and unbalanced bipolar supplies. The limit to lower supply-voltage operation is the useable input voltage range for the JFET-input stage. Operating from a single supply of 12 V can have numerous advantages. With the negative supply at ground, the dc errors due to the –PSRR term can be minimized. Typically, ac performance improves slightly at 12-V operation with a minimal increase in supply current.