ZHCSLZ5D October   2020  – December 2023 OPA3S328

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Diagram
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Switch Characterization Configurations
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Low Operating Voltage
      2. 7.3.2 Input and ESD Protection
      3. 7.3.3 Programmable Switches
      4. 7.3.4 Rail-to-Rail Input
      5. 7.3.5 Phase Reversal
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-Down Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Capacitive Load and Stability
      2. 8.1.2 EMI Susceptibility and Input Filtering
      3. 8.1.3 Transimpedance Amplifier
        1. 8.1.3.1 Optimizing the Transimpedance Circuit
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
        2. 9.1.1.2 TINA-TI™ 仿真软件（免费下载）
        3. 9.1.1.3 TI 参考设计
        4. 9.1.1.4 滤波器设计工具
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 接收文档更新通知
    4. 9.4 支持资源
    5. 9.5 Trademarks
    6. 9.6 静电放电警告
    7. 9.7 术语表
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

5.5 Electrical Characteristics

at TA = 25°C, VS = ±1.1 V to ±2.75 V (2.2 V to 5.5 V), RL = 10 kΩ connected to VS / 2, VCM = VS / 2, VOUT = VS / 2, and all voltages referred to V– (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage 10 ±60 μV
TA = 0°C to 85°C ±90
TA = –40°C to +125°C ±175
dVOS/dT Input offset voltage drift TA = –40°C to +125°C ±0.15 ±1 μV/°C
PSRR Power supply rejection ratio VS = ±1.1 V to ±2.75 V ±1 ±10 μV/V
TA = –40°C to +125°C ±15
Channel separation f = dc 140 dB
f = 100 kHz 75
INPUT BIAS CURRENT
IB Amplifier input bias current ±0.2 ±10 pA
TA = 0°C to 85°C ±10
TA = –40°C to +125°C ±100
IOS Amplifier input offset current ±0.2 ±20 pA
TA = 0°C to 85°C ±20
TA = –40°C to +125°C ±200
NOISE
  Input voltage noise f = 0.1 Hz to 10 Hz   3   μVPP
eN Input voltage noise density f = 100 Hz   25   nV/√Hz
f = 1 kHz   9.8  
f = 10 kHz   6.1  
iN Input current noise f = 10 kHz   0.04   pA/√Hz
INPUT VOLTAGE
VCM Common-mode voltage (V–) – 0.1 (V+) + 0.1 V
CMRR Common-mode rejection ratio (V–) – 0.1 V < VCM <
(V+) + 0.1 V		 106 120 dB
TA = –40°C to +125°C 96 110
INPUT CAPACITANCE
ZID Differential 1 || 4 TΩ || pF
ZICM Common-mode 1 || 2 TΩ || pF
OPEN-LOOP GAIN
AOL Open-loop voltage gain (V–) + 100 mV < VO <
(V+) – 100 mV		 108 132 dB
TA = –40°C to +125°C 96 130
(V–) + 100 mV < VO <
(V+) – 100 mV, RL = 2 kΩ		 106 123
TA = –40°C to +125°C 90 120
FREQUENCY RESPONSE
GBW Gain-bandwidth product 40 MHz
SR Slew rate 4-V step, G = +1 ±30 V/μs
tS Settling time To 0.1%, 4-V step , G = +1 0.3 μs
To 0.01%, 4-V step , G = +1 0.42
Overload recovery time VIN  × G > VS 0.5 μs
THD+N Total harmonic distortion + noise VO = 1 VRMS, G = +1, f = 1 kHz 0.00017%
fCP Charge pump frequency 27 MHz
OUTPUT
Voltage output swing from both rails VS = 2.2 V 5 mV
RL = 2 kΩ 15
VS = 5.5 V 5
RL = 2 kΩ 15
ISC Short-circuit current Sinking, VS = 5.5 V –68 mA
Sourcing, VS = 5.5 V 63
ZO Open-loop output impedance f = 10 kHz 55 Ω
OUTPUT DISABLE
IQPD Quiescent current in power down Total quiescent current, both amplifiers A and B disabled 30 50 µA
tPDOFF Output enable time 10 µs
tPD Output disable time 3 µs
ZPD Output impedance in power down 100 || 16 GΩ || pF
POWER SUPPLY
IQ Quiescent current per amplifier IO = 0 mA 3.8 4.5 mA
TA = –40°C to +125°C 5.0
SELECT INPUTS
VIH High level input voltage GND = 0 V 1.5 V+ V
VIL Low level input voltage GND = 0 V 0 0.3 V
GND voltage input range (V–) (V+) – 1.8 V
RPD Input pulldown resistance SELA/B/0/1 pins 10 MΩ
SWITCHES
tON Switching time off to on
(open to close)		 RL_SW = 300 Ω, CL = 35 pF, INSA/B = 5 V,
OUTSA/B/1/2/3 = 0 V, VS = 5 V		 1.3 µs
tOFF Switching time on to off
(close to open)		 RL_SW = 300 Ω, CL = 35 pF, INSA/B = 5 V,
OUTSA/B/1/2/3 = 0 V, VS = 5 V		 2 µs
IL_INS Switch input leakage current (INSA/B) Switch open, INSA/B = 5 V, OUTSA/B/1/2/3 = 0 V 30 pA
Switch open,
INSA/B = 1.5 V,
OUTSA/B/1/2/3 = 4.5 V		 10 150
TA = 0°C to 85°C 25 150
TA = –40°C to +125°C 82 260
IL_OUTS Switch output leakage current
(OUTSA/B/1/2/3)		 Switch open,
INSA/B = 1.5 V,
OUTSA/B/1/2/3 = 4.5 V		 11 90 pA
TA = 0°C to 85°C 100 120
TA = –40°C to +125°C 190 250
IL_ON Channel on leakage Switch closed,
INSA/B = 5 V,
OUTSA/B/1/2/3 = 5 V		 5 20 pA
TA = 0°C to 85°C 140
TA = –40°C to +125°C 155
CIN Switch input capacitance Switch open, INSA/B = 2.5 V 3 pF
COUT Switch output capacitance Switch open, OUTSA/B/1/2/3 = 2.5 V 0.7 pF
Switch total capacitance Switch closed, INSA/B = OUTSA/B/1/2/3 = 2.5 V 6 pF
RON Switch on resistance Switch closed,
V+ = 5 V, INSA/B = 2.5 V		 84 125 Ω
TA = 0°C to 85°C 88
TA = –40°C to +125°C 102
ΔRON Switch on resistance match between channels Switch closed,
V+ = 5 V, INSA/B = 4 V		 0.2 2 Ω
Switch on resistance flatness (vs input signal range) Switch closed,
V+ = 5 V, INSA/B = 0 V to V+		 27 40 Ω
TA = –40°C to +125°C 100
Switch charge injection CL_SW = 1 nF 6 pC
Switch off isolation RL_SW = 50 Ω, CL_SW = 5 pF, f = 1 MHz 84 dB
Switch channel-to-channel crosstalk RL_SW = 50 Ω, CL_SW = 5 pF, f = 1 MHz 76 dB
Switch −3-dB bandwidth RL_SW = 50 Ω, CL_SW = 5 pF 350 MHz