ZHCSIR5H September   2018  – August 2021 OPA210 , OPA2210

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA210
    5. 6.5 Thermal Information: OPA2210
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Voltage
      2. 7.3.2 Input Protection
      3. 7.3.3 Noise Performance
      4. 7.3.4 Phase-Reversal Protection
      5. 7.3.5 Electrical Overstress
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Basic Noise Calculations
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 System Example
      1. 8.3.1 Time Gain Control System for Ultrasound Applications
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 TINA-TI™ Simulation Software (Free Download)
        2. 11.1.1.2 DIP Adapter EVM
        3. 11.1.1.3 Universal Operational Amplifier EVM
        4. 11.1.1.4 TI Precision Designs
        5. 11.1.1.5 WEBENCH® Filter Designer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 接收文档更新通知
    4. 11.4 支持资源
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 术语表
  12. 12Mechanical, Packaging, and Orderable Information

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5 Pin Configuration and Functions

Figure 5-1 OPA210: D (8-Pin SOIC) and DGK (8-Pin VSSOP) Packages, Top View
GUID-20210414-CA0I-GB3C-KPHW-V8CD6XKGZM6N-low.gifFigure 5-2 OPA210: DBV (5-Pin SOT-23) Package, Top View
Table 5-1 Pin Functions: OPA210
PIN I/O DESCRIPTION
NAME SOIC, VSSOP SOT-23
–IN 2 4 I Inverting input
+IN 3 3 I Noninverting input
NC 1, 5, 8 — — No internal connection
OUT 6 1 O Output
V– 4 2 — Negative (lowest) power supply
V+ 7 5 — Positive (highest) power supply
GUID-A71904EF-1C1C-4A36-9208-80136A262D65-low.gif Figure 5-3 OPA2210: D (SOIC-8), DGK (VSSOP-8), and DRG (WSON-8) Packages, Top View
Table 5-2 Pin Functions: OPA2210
PIN I/O DESCRIPTION
NAME NO.
–IN A 2 I Inverting input, channel A
+IN A 3 I Noninverting input, channel A
–IN B 6 I Inverting input, channel B
+IN B 5 I Noninverting input, channel B
OUT A 1 O Output, channel A
OUT B 7 O Output, channel B
V– 4 — Negative (lowest) power supply
V+ 8 — Positive (highest) power supply