ZHCSSV1 august   2023 MCF8316C-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings Auto
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Characteristics of the SDA and SCL bus for Standard and Fast mode
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Output Stage
      2. 7.3.2  Device Interface
        1. 7.3.2.1 Interface - Control and Monitoring
        2. 7.3.2.2 I2C Interface
      3. 7.3.3  Step-Down Mixed-Mode Buck Regulator
        1. 7.3.3.1 Buck in Inductor Mode
        2. 7.3.3.2 Buck in Resistor mode
        3. 7.3.3.3 Buck Regulator with External LDO
        4. 7.3.3.4 AVDD Power Sequencing from Buck Regulator
        5. 7.3.3.5 Mixed Mode Buck Operation and Control
      4. 7.3.4  AVDD Linear Voltage Regulator
      5. 7.3.5  Charge Pump
      6. 7.3.6  Slew Rate Control
      7. 7.3.7  Cross Conduction (Dead Time)
      8. 7.3.8  Motor Control Input Sources
        1. 7.3.8.1 Analog-Mode Motor Control
        2. 7.3.8.2 PWM-Mode Motor Control
        3. 7.3.8.3 I2C-based Motor Control
        4. 7.3.8.4 Frequency-Mode Motor Control
        5. 7.3.8.5 Input Reference Profiles
          1. 7.3.8.5.1 Linear Reference Profiles
          2. 7.3.8.5.2 Staircase Speed Profile
          3. 7.3.8.5.3 Forward-Reverse Speed Profile
      9. 7.3.9  Starting the Motor Under Different Initial Conditions
        1. 7.3.9.1 Case 1 – Motor is Stationary
        2. 7.3.9.2 Case 2 – Motor is Spinning in the Forward Direction
        3. 7.3.9.3 Case 3 – Motor is Spinning in the Reverse Direction
      10. 7.3.10 Motor Start Sequence (MSS)
        1. 7.3.10.1 Initial Speed Detect (ISD)
        2. 7.3.10.2 Motor Resynchronization
        3. 7.3.10.3 Reverse Drive
          1. 7.3.10.3.1 Reverse Drive Tuning
        4. 7.3.10.4 Motor Start-up
          1. 7.3.10.4.1 Align
          2. 7.3.10.4.2 Double Align
          3. 7.3.10.4.3 Initial Position Detection (IPD)
            1. 7.3.10.4.3.1 IPD Operation
            2. 7.3.10.4.3.2 IPD Release Mode
            3. 7.3.10.4.3.3 IPD Advance Angle
          4. 7.3.10.4.4 Slow First Cycle Startup
          5. 7.3.10.4.5 Open Loop
          6. 7.3.10.4.6 Transition from Open to Closed Loop
      11. 7.3.11 Closed Loop Operation
        1. 7.3.11.1 Closed Loop Acceleration/Deceleration Slew Rate
        2. 7.3.11.2 Speed PI Control
        3. 7.3.11.3 Current PI Control
        4. 7.3.11.4 Torque Mode
        5. 7.3.11.5 Overmodulation
      12. 7.3.12 Motor Parameters
        1. 7.3.12.1 Motor Resistance
        2. 7.3.12.2 Motor Inductance
        3. 7.3.12.3 Motor Back-EMF constant
      13. 7.3.13 Motor Parameter Extraction Tool (MPET)
      14. 7.3.14 Anti-Voltage Surge (AVS)
      15. 7.3.15 Active Braking
      16. 7.3.16 Output PWM Switching Frequency
      17. 7.3.17 PWM Modulation Schemes
      18. 7.3.18 Dead Time Compensation
      19. 7.3.19 Motor Stop Options
        1. 7.3.19.1 Coast (Hi-Z) Mode
        2. 7.3.19.2 Low-Side Braking
        3. 7.3.19.3 High-Side Braking
        4. 7.3.19.4 Active Spin-Down
        5. 7.3.19.5 Align Braking
      20. 7.3.20 FG Configuration
        1. 7.3.20.1 FG Output Frequency
        2. 7.3.20.2 FG during Open and Closed Loop States
        3. 7.3.20.3 FG during Fault and Idle States
      21. 7.3.21 DC Bus Current Limit
      22. 7.3.22 Protections
        1. 7.3.22.1  VM Supply Undervoltage Lockout
        2. 7.3.22.2  AVDD Undervoltage Lockout (AVDD_UV)
        3. 7.3.22.3  BUCK Under Voltage Lockout (BUCK_UV)
        4. 7.3.22.4  VCP Charge Pump Undervoltage Lockout (CPUV)
        5. 7.3.22.5  Overvoltage Protection (OVP)
        6. 7.3.22.6  Overcurrent Protection (OCP)
          1. 7.3.22.6.1 OCP Latched Shutdown (OCP_MODE = 00b)
          2. 7.3.22.6.2 OCP Automatic Retry (OCP_MODE = 01b)
        7. 7.3.22.7  Buck Overcurrent Protection
        8. 7.3.22.8  Hardware Lock Detection Current Limit (HW_LOCK_ILIMIT)
          1. 7.3.22.8.1 HW_LOCK_ILIMIT Latched Shutdown (HW_LOCK_ILIMIT_MODE = 00xxb)
          2. 7.3.22.8.2 HW_LOCK_ILIMIT Automatic recovery (HW_LOCK_ILIMIT_MODE = 01xxb)
          3. 7.3.22.8.3 HW_LOCK_ILIMIT Report Only (HW_LOCK_ILIMIT_MODE = 1000b)
          4. 7.3.22.8.4 HW_LOCK_ILIMIT Disabled (HW_LOCK_ILIMIT_MODE= 1xx1b)
        9. 7.3.22.9  Lock Detection Current Limit (LOCK_ILIMIT)
          1. 7.3.22.9.1 LOCK_ILIMIT Latched Shutdown (LOCK_ILIMIT_MODE = 00xxb)
          2. 7.3.22.9.2 LOCK_ILIMIT Automatic Recovery (LOCK_ILIMIT_MODE = 01xxb)
          3. 7.3.22.9.3 LOCK_ILIMIT Report Only (LOCK_ILIMIT_MODE = 1000b)
          4. 7.3.22.9.4 LOCK_ILIMIT Disabled (LOCK_ILIMIT_MODE = 1xx1b)
        10. 7.3.22.10 FET Thermal Warning (OTW)
        11. 7.3.22.11 FET Thermal Shutdown (TSD_FET)
        12. 7.3.22.12 Motor Lock (MTR_LCK)
          1. 7.3.22.12.1 MTR_LCK Latched Shutdown (MTR_LCK_MODE = 00xxb)
          2. 7.3.22.12.2 MTR_LCK Automatic Recovery (MTR_LCK_MODE= 01xxb)
          3. 7.3.22.12.3 MTR_LCK Report Only (MTR_LCK_MODE = 1000b)
          4. 7.3.22.12.4 MTR_LCK Disabled (MTR_LCK_MODE = 1xx1b)
        13. 7.3.22.13 Motor Lock Detection
          1. 7.3.22.13.1 Lock 1: Abnormal Speed (ABN_SPEED)
          2. 7.3.22.13.2 Lock 2: Abnormal BEMF (ABN_BEMF)
          3. 7.3.22.13.3 Lock3: No-Motor Fault (NO_MTR)
        14. 7.3.22.14 MPET Faults
        15. 7.3.22.15 IPD Faults
    4. 7.4 Device Functional Modes
      1. 7.4.1 Functional Modes
        1. 7.4.1.1 Sleep Mode
        2. 7.4.1.2 Standby Mode
        3. 7.4.1.3 Fault Reset (CLR_FLT)
    5. 7.5 External Interface
      1. 7.5.1 DRVOFF Functionality
      2. 7.5.2 DAC outputs
      3. 7.5.3 Current Sense Output
      4. 7.5.4 Oscillator Source
        1. 7.5.4.1 External Clock Source
      5. 7.5.5 External Watchdog
    6. 7.6 EEPROM access and I2C interface
      1. 7.6.1 EEPROM Access
        1. 7.6.1.1 EEPROM Write
        2. 7.6.1.2 EEPROM Read
      2. 7.6.2 I2C Serial Interface
        1. 7.6.2.1 I2C Data Word
        2. 7.6.2.2 I2C Write Transaction
        3. 7.6.2.3 I2C Read Transaction
        4. 7.6.2.4 I2C Communication Protocol Packet Examples
        5. 7.6.2.5 I2C Clock Stretching
        6. 7.6.2.6 CRC Byte Calculation
    7. 7.7 EEPROM (Non-Volatile) Register Map
      1. 7.7.1 Algorithm_Configuration Registers
      2. 7.7.2 Fault_Configuration Registers
      3. 7.7.3 Hardware_Configuration Registers
      4. 7.7.4 Internal_Algorithm_Configuration Registers
    8. 7.8 RAM (Volatile) Register Map
      1. 7.8.1 Fault_Status Registers
      2. 7.8.2 System_Status Registers
      3. 7.8.3 Device_Control Registers
      4. 7.8.4 Algorithm_Control Registers
      5. 7.8.5 Algorithm_Variables Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Application Curves
        1. 8.2.1.1 Motor startup
        2. 8.2.1.2 MPET
        3. 8.2.1.3 Dead time compensation
        4. 8.2.1.4 Auto handoff
        5. 8.2.1.5 Anti voltage surge (AVS)
        6. 8.2.1.6 Real time variable tracking using DACOUT
  10. 9 Power Supply Recommendations
    1. 9.1 Bulk Capacitance
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
      1. 10.3.1 Power Dissipation
  12. 11Device and Documentation Support
    1. 11.1 支持资源
    2. 11.2 Trademarks
    3. 11.3 静电放电警告
    4. 11.4 术语表
  13. 12Mechanical, Packaging, and Orderable Information

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7.3.10 Motor Start Sequence (MSS)

Figure 7-22 shows the motor-start sequence implemented in the MCF8316C-Q1 device.

GUID-1F411095-90AD-4C3E-BEBD-5FDB77C2086A-low.svgFigure 7-22 Motor Start Sequence
GUID-2F2882E5-D2B7-4A13-A451-ADACEBDD8FCE-low.svgFigure 7-23 Brake Routine
    Power-On StateThis is the initial state of the Motor Start Sequence (MSS) when MCF8316C-Q1 is powered on. In this state, MCF8316C-Q1 configures the peripherals, initializes the algorithm parameters from EEPROM and prepares for driving the motor.
    Sleep/StandbyIn this state, SPEED_REF is set to zero and MCF8316C-Q1 is either in sleep or standby mode depending on DEV_MODE and SPEED/WAKE pin voltage.
    SPEED_REF > 0 JudgementWhen SPEED_REF is set to greater than zero, MCF8316C-Q1 exits the sleep/standby state and proceeds to ISD_EN judgement. As long as SPEED_REF is set to zero, MCF8316C-Q1 stays in sleep/standby state.
    Direction Change Command JudgementWhen a direction change command is received, MCF8316C-Q1 proceeds to DIR_CHANGE_MODE judgement.
    DIR_CHANGE_MODE JudgementIf DIR_CHANGE_MODE is set to 0b, MCF8316C-Q1 initiates direction change by proceeding to ISD_EN judgement. Instead, if DIR_CHANGE_MODE is set to 1b, MCF8316C-Q1 initiates direction change by proceeding to Speed > OPN_CL_HANDOFF_THR judgement.
    ISD_EN JudgementMCF8316C-Q1 checks to see if the initial speed detect (ISD) function is enabled (ISD_EN = 1b). If ISD is enabled, MSS proceeds to the BEMF < STAT_DETECT_THR judgement. Instead, if ISD is disabled, the MSS proceeds directly to the BRAKE_EN judgement.
    BEMF < STAT_DETECT_THR or BEMF < FG_BEMF_THR JudgementISD determines the initial condition (speed, angle, direction of spin) of the motor (see Section 7.3.10.1). If motor is deemed to be stationary (BEMF < STAT_DETECT_THR or BEMF < FG_BEMF_THR), the MSS proceeds to BRAKE_EN judgement. If the motor is not stationary, MSS proceeds to verify the direction of spin.
    Direction of spin JudgementThe MSS determines whether the motor is spinning in the forward or the reverse direction. If the motor is spinning in the forward direction, the MCF8316C-Q1 proceeds to the RESYNC_EN judgement. If the motor is spinning in the reverse direction, the MSS proceeds to the RVS_DR_EN judgement.
    RESYNC_EN JudgementIf RESYNC_EN is set to 1b, MCF8316C-Q1 proceeds to Speed > Open to Closed Loop Handoff (Resync) judgement. If RESYNC_EN is set to 0b, MSS proceeds to HIZ_EN judgement.
    Speed > FW_DRV_RESYN_THR JudgementIf motor speed > FW_DRV_RESYN_THR, MCF8316C-Q1 uses the speed and position information from the ISD to transition to the closed loop state (see Section 7.3.10.2 ) directly. If motor speed < FW_DRV_RESYN_THR, MCF8316C-Q1 transitions to open loop state.
    RVS_DR_EN JudgementThe MSS checks to see if the reverse drive function is enabled (RVS_DR_EN = 1b). If it is enabled, the MSS transitions to check speed of the motor in reverse direction. If the reverse drive function is not enabled (RVS_DR_EN = 0b), the MSS advances to the HIZ_EN judgement.
    Speed > OPN_CL_HANDOFF_THR JudgementThe MSS checks to see if the reverse speed is high enough for MCF8316C-Q1 to decelerate in closed loop. Till the speed (in reverse direction) is above OL_CL_HANDOFF_THR, MSS stays in closed loop deceleration. If speed is below OPN_CL_HANDOFF_THR, then the MSS transitions to open loop deceleration.
    Reverse Closed Loop, Open Loop Deceleration and Zero Speed CrossoverThe MCF8316C-Q1 resynchronizes in the reverse direction, decelerates the motor in closed loop till motor speed falls below the handoff threshold. (see Reverse Drive). When motor speed in reverse direction is too low, the MCF8316C-Q1 switches to open-loop, decelerates the motor in open-loop, crosses zero speed, and accelerates in the forward direction in open-loop before entering closed loop operation after motor speed is sufficiently high.
    HIZ_EN JudgementThe MSS checks to determine whether the coast (Hi-Z) function is enabled (HIZ_EN = 1b). If the coast function is enabled (HIZ_EN = 1b), the MSS advances to the coast routine. If the coast function is disabled (HIZ_EN = 0b), the MSS advances to the BRAKE_EN judgement.
    Coast (Hi-Z) RoutineThe device coasts the motor by turning OFF all six MOSFETs for a certain time configured by HIZ_TIME.
    BRAKE_EN JudgementThe MSS checks to determine whether the brake function is enabled (BRAKE_EN = 1b). If the brake function is enabled (BRAKE_EN = 1b), the MSS advances to the brake routine. If the brake function is disabled (BRAKE_EN = 0b), the MSS advances to the motor start-up state (see Section 7.3.10.4).
    Brake RoutineMCF8316C-Q1 implements either a time based brake (duration configured by BRK_TIME) or a current based brake (brake applied till phase currents < BRK_CURR_THR for BRAKE_CURRENT_PERSIST) based on BRK_CONFIG. Current based brake has a timeout to ensure brake state ends in case phase currents do not drop below BRK_CURR_THR within BRK_TIME. Time based brake can be applied either using high-side or low-side MOSFETs based on BRK_MODE configuration. Current based brake is applied using low-side MOSFETs only.
    Closed Loop StateIn this state, the MCF8316C-Q1 drives the motor with sensorless FOC based on rotor angle estimation.