ZHCSLK4S July   2004  – May 2025 LP2985 , LP2985A

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Output Enable
      2. 6.3.2 Dropout Voltage
      3. 6.3.3 Current Limit
      4. 6.3.4 Undervoltage Lockout (UVLO)
      5. 6.3.5 Output Pulldown
      6. 6.3.6 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Device Functional Mode Comparison
      2. 6.4.2 Normal Operation
      3. 6.4.3 Dropout Operation
      4. 6.4.4 Disabled
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Recommended Capacitor Types
        1. 7.1.1.1 Recommended Capacitors (Legacy Chip)
        2. 7.1.1.2 Recommended Capacitors (New Chip)
      2. 7.1.2 Input and Output Capacitor Requirements
        1. 7.1.2.1 Input Capacitor Requirements
        2. 7.1.2.2 Output Capacitor Requirements
      3. 7.1.3 Noise Bypass Capacitor (CBYPASS)
      4. 7.1.4 Reverse Current
      5. 7.1.5 Power Dissipation (PD)
      6. 7.1.6 Estimating Junction Temperature
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 ON/OFF Operation
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 接收文档更新通知
    3. 8.3 支持资源
    4. 8.4 Trademarks
    5. 8.5 静电放电警告
    6. 8.6 术语表
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
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订购信息

Application Curves

at operating temperature TJ = 25°C, VIN = VOUT(NOM) + 1.0 V or 2.5 V (whichever is greater), IOUT = 1 mA, ON/OFF pin tied to VIN, CIN = 1.0 µF, and COUT = 4.7 µF (unless otherwise noted)

LP2985 LP2985A Load
                        Transient Response for Legacy Chip
 
Figure 7-3 Load Transient Response for Legacy Chip
LP2985 LP2985A Load
                        Transient Response for Legacy Chip
 
Figure 7-5 Load Transient Response for Legacy Chip
LP2985 LP2985A Load
                        Transient Response for Legacy Chip
 
Figure 7-7 Load Transient Response for Legacy Chip
LP2985 LP2985A Line
                        Transient Response for Legacy Chip
 
Figure 7-9 Line Transient Response for Legacy Chip
LP2985 LP2985A Line
                        Transient Response for Legacy Chip
 
Figure 7-11 Line Transient Response for Legacy Chip
LP2985 LP2985A Line
                        Transient Response for Legacy Chip
 
Figure 7-13 Line Transient Response for Legacy Chip
LP2985 LP2985A Line
                        Transient Response for Legacy Chip
 
Figure 7-15 Line Transient Response for Legacy Chip
LP2985 LP2985A Turn-On Time for Legacy Chip
 
Figure 7-17 Turn-On Time for Legacy Chip
LP2985 LP2985A Turn-On Time for Legacy Chip
 
Figure 7-19 Turn-On Time for Legacy Chip
LP2985 LP2985A Turn-On Time for Legacy Chip
COUT = 4.7 μF
Figure 7-21 Turn-On Time for Legacy Chip
LP2985 LP2985A Turn-On Time
COUT = 4.7 μF
Figure 7-23 Turn-On Time
LP2985 LP2985A Load Transient Response
                        for New Chip
dI/dt = 1 A/μ
Figure 7-4 Load Transient Response for New Chip
LP2985 LP2985A Load Transient for New
                        Chip
dI/dt = 1 A/μ
Figure 7-6 Load Transient for New Chip
LP2985 LP2985A Load Transient Response
                        for New Chip
dI/dt = 1 A/μ
Figure 7-8 Load Transient Response for New Chip
LP2985 LP2985A Line Transient Response
                        for New Chip
VOUT = 3.3 V, CBYP = 0 nF, ΔVIN = 1 V, IOUT = 150 mA, dV/dt = 1 V/μ
Figure 7-10 Line Transient Response for New Chip
LP2985 LP2985A Line Transient Response
                        for New Chip
VOUT = 3.3 V, CBYP = 10 nF, ΔVIN = 1 V, IOUT = 150 mA, dV/dt = 1 V/μ
Figure 7-12 Line Transient Response for New Chip
LP2985 LP2985A Line Transient Response
                        for New Chip
VOUT = 3.3 V, CBYP = 0 nF, ΔVIN = 1 V, IOUT = 1 mA, dV/dt = 1 V/μ
Figure 7-14 Line Transient Response for New Chip
LP2985 LP2985A Line Transient Response
                        for New Chip
VOUT = 3.3 V, CBYP = 10 nF, ΔVIN = 1 V, IOUT = 1 mA, dV/dt = 1 V/μ
Figure 7-16 Line Transient Response for New Chip
LP2985 LP2985A Turn-On Time for New
                        Chip
 
Figure 7-18 Turn-On Time for New Chip
LP2985 LP2985A Turn-On Time for New
                        Chip
 
Figure 7-20 Turn-On Time for New Chip
LP2985 LP2985A Turn-On Time for New
                        Chip
COUT = 4.7 μF
Figure 7-22 Turn-On Time for New Chip
LP2985 LP2985A Turn-On Time for New
                        Chip
COUT = 4.7 μF
Figure 7-24 Turn-On Time for New Chip