SLVSIH5 March   2026 LMS1225

PRODUCT PREVIEW  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
  7. 6Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 VCC and Undervoltage Lockout
      2. 6.3.2 Current Sense
      3. 6.3.3 Temperature Sensing and Reporting
      4. 6.3.4 Dead Time Compensation
      5. 6.3.5 Ideal Diode Mode
  8. 7Device and Documentation Support
    1. 7.1 Receiving Notification of Documentation Updates
    2. 7.2 Support Resources
    3. 7.3 Trademarks
    4. 7.4 Electrostatic Discharge Caution
    5. 7.5 Glossary
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information
    1. 9.1 Mechanical Data

请参考 PDF 数据表获取器件具体的封装图。

6.3.4 Dead Time Compensation

In Figure 6-5, VDS is the drain-to-source voltage which is connected to the drain pin. PWM is the gate-driver input-command signal from digital controller on the PWM pin. DTC is the signal from the DTC pin on LMS1225. The DTC pin outputs an active low pulse that occurs after the drain to source voltage goes beyond the –250mV threshold. The pulse is a fixed length pulse with duration according to the switching characteristics table. The GATE (internal) signal is the gate-driver output and describes when the device is driven on. The body-diode conduction detection comparator has a –250mV threshold.

LMS1225 Input-Output Timing Diagram (Turn-On Optimization is Enabled) Figure 6-5 Input-Output Timing Diagram (Turn-On Optimization is Enabled)

To improve noise immunity, the comparator output DTC blanks when the gate driver output, GATE (internal), is high. The DTC signal always outputs high when OUT is high.