SNVS754M January   2000  – February 2026 LM78L

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Thermal Information
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Electrical Characteristics: LM78L33 (New Chip Only)
    6. 5.6  Electrical Characteristics: LM78L05 (Legacy and New Chip)
    7. 5.7  Electrical Characteristics: LM78L06 (New Chip Only)
    8. 5.8  Electrical Characteristics: LM78L09 (Legacy Chip Only)
    9. 5.9  Electrical Characteristics: LM78L12 (Legacy and New Chip)
    10. 5.10 Electrical Characteristics: LM78L15 (Legacy and New Chip)
    11. 5.11 Electrical Characteristics: LM78L62 (Legacy Chip Only)
    12. 5.12 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Load Regulation
      2. 6.3.2 Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Shutdown
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input Capacitor
        2. 7.2.2.2 Output Capacitor
        3. 7.2.2.3 Power Dissipation (PD)
        4. 7.2.2.4 Estimating Junction Temperature
        5. 7.2.2.5 Overload Recovery
        6. 7.2.2.6 Reverse Current
        7. 7.2.2.7 Polarity Reversal Protection
      3. 7.2.3 Application Curve
      4. 7.2.4 Other Application Circuits
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Evaluation Module
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

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机械数据 (封装 | 引脚)
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订购信息

Power Dissipation (PD)

Circuit reliability requires consideration of the device power dissipation, location of the circuit on the printed circuit board (PCB), and correct sizing of the thermal plane. The PCB area around the regulator must have few or no other heat-generating devices that cause added thermal stress.

To first-order approximation, power dissipation in the regulator depends on the input-to-output voltage difference and load conditions. The following equation calculates power dissipation (PD).

Equation 1. PD=VI-VO×IO
Note: Power dissipation can be minimized, and therefore greater efficiency can be achieved, by correct selection of the system voltage rails. For the lowest power dissipation, use the minimum input voltage required for correct output regulation.

For devices with a thermal pad, the primary heat conduction path for the device package is through the thermal pad to the PCB. Solder the thermal pad to a copper pad area under the device. This pad area must contain an array of plated vias that conduct heat to additional copper planes for increased heat dissipation.

The maximum power dissipation determines the maximum allowable ambient temperature (TA) for the device. According to the following equation, power dissipation and junction temperature are most often related by the junction-to-ambient thermal resistance (RθJA) of the combined PCB and device package and the temperature of the ambient air (TA).

Equation 2. TJ=TA+RθJA×PD

Thermal resistance (RθJA) highly depends on the heat-spreading capability built into the particular PCB design, and therefore varies according to the total copper area, copper weight, and location of the planes. The junction-to-ambient thermal resistance listed in the Thermal Information table is determined by the JEDEC standard PCB and copper-spreading area, and is used as a relative measure of package thermal performance. As mentioned in the An empirical analysis of the impact of board layout on LDO thermal performance application note, RθJA can be improved by 35% to 55% compared to the Thermal Information table value with the PCB board layout optimization.