ZHCS527G January   2007  – April 2025 LM5574

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 High Voltage Start-Up Regulator
      2. 6.3.2 Oscillator and Sync Capability
      3. 6.3.3 Error Amplifier and PWM Comparator
      4. 6.3.4 Ramp Generator
      5. 6.3.5 Maximum Duty Cycle, Input Dropout Voltage
      6. 6.3.6 Current Limit
      7. 6.3.7 Soft Start
      8. 6.3.8 Boost Pin
      9. 6.3.9 Thermal Protection
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1  Custom Design With WEBENCH® Tools
        2. 7.2.2.2  External Components
        3. 7.2.2.3  R3 (R)T
        4. 7.2.2.4  L1-Inductor
        5. 7.2.2.5  C3 (C)RAMP
        6. 7.2.2.6  C9-Output Capacitor
        7. 7.2.2.7  D1-Async Diode
        8. 7.2.2.8  C1-Input Capacitor
        9. 7.2.2.9  C8-VCC Capacitor
        10. 7.2.2.10 C7-BST Capacitor
        11. 7.2.2.11 C4- SS Capacitor
        12. 7.2.2.12 R5, R6- Feedback Resistors
        13. 7.2.2.13 R1, R2, C2-SD Pin Components
        14. 7.2.2.14 R4, C5, C6-Compensation Components
        15. 7.2.2.15 Bias Power Dissipation Reduction
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
      3. 7.4.3 Power Dissipation
      4. 7.4.4 Thermal Considerations
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 第三方产品免责声明
      2. 8.1.2 Development Support
        1. 8.1.2.1 Custom Design With WEBENCH® Tools
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 接收文档更新通知
    4. 8.4 支持资源
    5. 8.5 Trademarks
    6. 8.6 静电放电警告
    7. 8.7 术语表
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

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4 Pin Configuration and Functions

LM5574 PW Package16-Pin TSSOP(Top View)Figure 4-1 PW Package16-Pin TSSOP(Top View)
Table 4-1 Pin Functions
PIN TYPE(1) DESCRIPTION APPLICATION INFORMATION
NO. NAME
1 VCC O Output of the bias regulator Vcc monitors Vin up to 9V. Beyond 9V, Vcc is regulated to 7V. A 0.1µF to 1µF ceramic decoupling capacitor is required. An external voltage (7.5V – 14V) can be applied to this pin to reduce internal power dissipation.
2 SD I Shutdown or UVLO input If the SD pin voltage is less than 0.7V, the regulator is in a low power state. If the SD pin voltage is between 0.7V and 1.225V, the regulator is in standby mode. If the SD pin voltage is more than 1.225V, the regulator is operational. An external voltage divider can be used to set a line undervoltage shutdown threshold. If the SD pin is left open circuit, a 5µA pullup current source configures the regulator fully operational.
3 Vin I Input supply voltage Nominal operating range: 6V to 75V
4 SYNC I Oscillator synchronization input or output The internal oscillator can be synchronized to an external clock with an external pulldown device. Multiple LM5574 devices can be synchronized together by connection of the SYNC pins.
5 COMP O Output of the internal error amplifier The loop compensation network must be connected between this pin and the FB pin.
6 FB I Feedback signal from the regulated output This pin is connected to the inverting input of the internal error amplifier. The regulation threshold is 1.225V.
7 RT I Internal oscillator frequency set input The internal oscillator is set with a single resistor connected between this pin and the AGND pin.
8 RAMP O Ramp control signal An external capacitor connected between this pin and the AGND pin sets the ramp slope used for current mode control. Recommended capacitor range 50pF to 2000pF.
9 AGND GND Analog ground Internal reference for the regulator control functions
10 SS O Soft-start An external capacitor and an internal 10µA current source set the time constant for the rise of the error amp reference. The SS pin is held low during standby, Vcc UVLO, and thermal shutdown.
11 OUT O Output voltage connection Connect directly to the regulated output voltage.
12 PGND GND Power ground Low-side reference for the PRE switch and the IS sense resistor.
13 IS I Current sense Current measurement connection for the re-circulating diode. An internal sense resistor and a sample and hold circuit sense the diode current near the conclusion of the off-time. This current measurement provides the DC level of the emulated current ramp.
14 SW O Switching node The source terminal of the internal buck switch. The SW pin must be connected to the external Schottky diode and to the buck inductor.
15 PRE O Pre-charge assist for the bootstrap capacitor This open-drain output can be connected to SW pin to help charging the bootstrap capacitor during very light load conditions or in applications where the output can be pre-charged before the LM5574 is enabled. An internal pre-charge MOSFET is turned on for 250ns each cycle just prior to the on-time interval of the buck switch.
16 BST I Boost input for bootstrap capacitor An external capacitor is required between the BST and the SW pins. TI recommends a 0.022µF ceramic capacitor. The capacitor is charged from Vcc through an internal diode during the off-time of the buck switch.
(1) I = input, O = output, GND = ground