ZHCSCW5B August   2014  – September 2017 LM43600

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 简化电路原理图
    1.     5
    2.     辐射发射图VIN = 12V，VOUT = 3.3V，FSW= 500kHz，IOUT = 0.5A
  5. 5 修订历史记录
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Fixed Frequency Peak Current Mode Controlled Step-Down Regulator
      2. 8.3.2  Light Load Operation
      3. 8.3.3  Adjustable Output Voltage
      4. 8.3.4  Enable (ENABLE)
      5. 8.3.5  VCC, UVLO and BIAS
      6. 8.3.6  Soft Start and Voltage Tracking (SS/TRK)
      7. 8.3.7  Switching Frequency (RT) and Synchronization (SYNC)
      8. 8.3.8  Minimum ON-Time, Minimum OFF-Time and Frequency Foldback at Dropout Conditions
      9. 8.3.9  Internal Compensation and CFF
      10. 8.3.10 Bootstrap Voltage (BOOT)
      11. 8.3.11 Power Good (PGOOD)
      12. 8.3.12 Overcurrent and Short-Circuit Protection
      13. 8.3.13 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Stand-by Mode
      3. 8.4.3 Active Mode
      4. 8.4.4 CCM Mode
      5. 8.4.5 Light Load Operation
      6. 8.4.6 Self-Bias Mode
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Custom Design With WEBENCH® Tools
        2. 9.2.2.2  Output Voltage Setpoint
        3. 9.2.2.3  Switching Frequency
        4. 9.2.2.4  Input Capacitors
        5. 9.2.2.5  Inductor Selection
        6. 9.2.2.6  Output Capacitor Selection
        7. 9.2.2.7  Feedforward Capacitor
        8. 9.2.2.8  Bootstrap Capacitors
        9. 9.2.2.9  VCC Capacitor
        10. 9.2.2.10 BIAS Capacitors
        11. 9.2.2.11 Soft-Start Capacitors
        12. 9.2.2.12 Undervoltage Lockout Setpoint
        13. 9.2.2.13 PGOOD
      3. 9.2.3 Application Performance Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Compact Layout for EMI Reduction
      2. 11.1.2 Ground Plane and Thermal Considerations
      3. 11.1.3 Feedback Resistors
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 开发支持
      1. 12.1.1 使用 WEBENCH® 工具创建定制设计
    2. 12.2 接收文档更新通知
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 Glossary
  13. 13机械、封装和可订购信息

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • PWP|16
散热焊盘机械数据 (封装 | 引脚)
订购信息

11.1.1 Compact Layout for EMI Reduction

Radiated EMI is generated by the high di/dt components in pulsing currents in switching converters. The larger area covered by the path of a pulsing current, the more electromagnetic emission is generated. The key to minimize radiated EMI is to identify the pulsing current path and minimize the area of the path. In Buck converters,the pulsing current path is from the VIN side of the input capacitors to HS switch, to the LS switch, and then return to the ground of the input capacitors, as shown in Figure 106.

LM43600 Buck-didt.gifFigure 106. Buck Converter High di / dt Path

High frequency ceramic bypass capacitors at the input side provide primary path for the high di/dt components of the pulsing current. Placing ceramic bypass capacitor(s) as close as possible to the VIN and PGND pins is the key to EMI reduction.

The SW pin connecting to the inductor should be as short as possible, and just wide enough to carry the load current without excessive heating. Short, thick traces or copper pours (shapes) should be used for high current condution path to minimize parasitic resistance. The output capacitors should be place close to the VOUT end of the inductor and closely grounded to PGND pin and exposed PAD.

The bypass capacitors on VCC and BIAS pins should be placed as close as possible to the pins respectively and closely grounded to PGND and the exposed PAD.