ZHCSQZ4A July   2022  – October 2022 DRV8300U

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings Comm
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Diagrams
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Three BLDC Gate Drivers
        1. 8.3.1.1 Gate Drive Timings
          1. 8.3.1.1.1 Propagation Delay
          2. 8.3.1.1.2 Deadtime and Cross-Conduction Prevention
        2. 8.3.1.2 Mode (Inverting and non inverting INLx)
      2. 8.3.2 Pin Diagrams
      3. 8.3.3 Gate Driver Protective Circuits
        1. 8.3.3.1 VBSTx Undervoltage Lockout (BSTUV)
        2. 8.3.3.2 GVDD Undervoltage Lockout (GVDDUV)
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Bootstrap Capacitor and GVDD Capacitor Selection
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 接收文档更新通知
    2. 12.2 支持资源
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 术语表
  13. 13Mechanical, Packaging, and Orderable Information

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6 Pin Configuration and Functions

GUID-2347D2A9-1CB5-4418-A811-7E097EF4AC62-low.gifFigure 6-1 DRV8300UD RGE Package24-Pin VQFN With Exposed Thermal PadTop View
Table 6-1 Pin Functions—24-Pin DRV8300U Devices
PINTYPE(1)DESCRIPTION
NAMENO.
BSTA20OBootstrap output pin. Connect capacitor between BSTA and SHA
BSTB17OBootstrap output pin. Connect capacitor between BSTB and SHB
BSTC14OBootstrap output pin. Connect capacitor between BSTC and SHC
DT21IDeadtime input pin. Connect resistor to ground for variable deadtime, fixed deadtime when left it floating
GHA19OHigh-side gate driver output. Connect to the gate of the high-side power MOSFET.
GHB16OHigh-side gate driver output. Connect to the gate of the high-side power MOSFET.
GHC13OHigh-side gate driver output. Connect to the gate of the high-side power MOSFET.
GLA11OLow-side gate driver output. Connect to the gate of the low-side power MOSFET.
GLB10OLow-side gate driver output. Connect to the gate of the low-side power MOSFET.
GLC9OLow-side gate driver output. Connect to the gate of the low-side power MOSFET.
INHA22IHigh-side gate driver control input. This pin controls the output of the high-side gate driver.
INHB23IHigh-side gate driver control input. This pin controls the output of the high-side gate driver.
INHC24IHigh-side gate driver control input. This pin controls the output of the high-side gate driver.
INLA1ILow-side gate driver control input. This pin controls the output of the low-side gate driver.
INLB2ILow-side gate driver control input. This pin controls the output of the low-side gate driver.
INLC3ILow-side gate driver control input. This pin controls the output of the low-side gate driver.
MODE5IMode Input controls polarity of GLx compared to INLx inputs.
Mode pin floating: GLx output polarity same(Non-Inverted) as INLx input
Mode pin to GVDD: GLx output polarity inverted compared to INLx input
NC7, 8NCNo internal connection. This pin can be left floating or connected to system ground.
GND6PWRDevice ground.
SHA18IHigh-side source sense input. Connect to the high-side power MOSFET source.
SHB15IHigh-side source sense input. Connect to the high-side power MOSFET source.
SHC12IHigh-side source sense input. Connect to the high-side power MOSFET source.
GVDD4PWRGate driver power supply input. Connect a X5R or X7R, GVDD-rated ceramic and greater then or equal to 10-uF local capacitance between the GVDD and GND pins.
(1) PWR = power, I = input, O = output, NC = no connection
GUID-7E2C4189-4E59-4549-9560-19243BB9EF28-low.gifFigure 6-2 DRV8300UD, DRV8300UDI PW Package20-Pin TSSOPTop View
Table 6-2 Pin Functions—20-Pin DRV8300U Devices
PINTYPE1DESCRIPTION
NAMENO.
BSTA20OBootstrap output pin. Connect capacitor between BSTA and SHA
BSTB17OBootstrap output pin. Connect capacitor between BSTB and SHB
BSTC14OBootstrap output pin. Connect capacitor between BSTC and SHC
GHA19OHigh-side gate driver output. Connect to the gate of the high-side power MOSFET.
GHB16OHigh-side gate driver output. Connect to the gate of the high-side power MOSFET.
GHC13OHigh-side gate driver output. Connect to the gate of the high-side power MOSFET.
GLA11OLow-side gate driver output. Connect to the gate of the low-side power MOSFET.
GLB10OLow-side gate driver output. Connect to the gate of the low-side power MOSFET.
GLC9OLow-side gate driver output. Connect to the gate of the low-side power MOSFET.
INHA1IHigh-side gate driver control input. This pin controls the output of the high-side gate driver.
INHB2IHigh-side gate driver control input. This pin controls the output of the high-side gate driver.
INHC3IHigh-side gate driver control input. This pin controls the output of the high-side gate driver.
INLA4ILow-side gate driver control input. This pin controls the output of the low-side gate driver.
INLB5ILow-side gate driver control input. This pin controls the output of the low-side gate driver.
INLC6ILow-side gate driver control input. This pin controls the output of the low-side gate driver.
GND8PWRDevice ground.
SHA18IHigh-side source sense input. Connect to the high-side power MOSFET source.
SHB15IHigh-side source sense input. Connect to the high-side power MOSFET source.
SHC12IHigh-side source sense input. Connect to the high-side power MOSFET source.
GVDD7PWRGate driver power supply input. Connect a X5R or X7R, GVDD-rated ceramic and greater then or equal to 10-uF local capacitance between the GVDD and GND pins.
  1. PWR = power, I = input, O = output, NC = no connection