ZHCSP55A October 2019 – October 2021 DRV10982-Q1
PRODUCTION DATA
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
ISDThr[1] | ISDThr[0] | BrkCurThrSel | BEMF_HYS | ISDEn | RvsDrEn | RvsDrThr[1] | RvsDrThr[0] |
R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
OpenLCurr[1] | OpenLCurr[0] | OpLCurrRt[2] | OpLCurrRt[1] | OpLCurrRt[0] | BrkDoneThr[2] | BrkDoneThr[1] | BrkDoneThr[0] |
R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15:14 | ISDThr[1:0] | R/W | 00 | ISD stationary judgment threshold 00: 6 Hz (80 ms, no zero cross) 01: 3 Hz (160 ms, no zero cross) 10: 1.6 Hz (320 ms, no zero cross) 11: 0.8 Hz (640 ms, no zero cross) |
13 | BrkCurThrSel | R/W | 0 | Brake current-level-threshold selection. 0: 24 mA 1: 48 mA |
12 | BEMF_HYS | R/W | 0 | 0: Low hysteresis for BEMF comparator (approximately 20 mV) 1: High hysteresis for BEMF comparator (approximately 40 mV) |
11 | ISDEn | R/W | 0 | 0: Initial speed detect (ISD) disabled 1: ISD enabled |
10 | RvsDrEn | R/W | 0 | 0: Reverse drive disabled 1: Reverse drive enabled |
9:8 | RvsDrThr[1:0] | R/W | 00 | The threshold where device starts to process revers drive (RvsDr) or brake. 00: 6.3 Hz 01: 13 Hz 10: 26 Hz 11: 51 Hz |
7:6 | OpenLCurr[1:0] | R/W | 00 | Open-loop current setting. 00: 0.2 A 01: 0.4 A 10: 0.8 A 11: 1.6 A Align current setting. 00: 0.15 A 01: 0.3 A 10: 0.6 A 11: 1.2 A |
5:3 | OpLCurrRt[2:0] | R/W | 000 | Open-loop current ramp-up setting. 000: 6 VCC/s 001: 3 VCC/s 010: 1.5 VCC/s 011: 0.7 VCC/s 100: 0.34 VCC/s 101: 0.16 VCC/s 110: 0.07 VCC/s 111: 0.023 VCC/s |
2:0 | BrkDoneThr[2:0] | R/W | 000 | Braking mode setting. 000: No brake (BrkEn = 0) 001: 2.7 s 010: 1.3 s 011: 0.67 s 100: 0.33 s 101: 0.16 s 110: 0.08 s 111: 0.04 s |