ZHCSQA3F November   1997  – March 2022 CD54HC4094 , CD74HC4094 , CD74HCT4094

PRODUCTION DATA  

  1. 1 特性
  2. 2 说明
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Prerequisite for Switching Characteristics
    6. 5.6 Switching Characteristics
  6. 6 Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  8. 8 Power Supply Recommendations
  9. 9 Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 接收文档更新通知
    3. 10.3 支持资源
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 术语表
  11. 11Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • PW|16
  • NS|16
  • N|16
  • D|16
散热焊盘机械数据 (封装 | 引脚)
订购信息

5.4 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS(2) VCC
(V)		 25°C –40°C to 85°C –55°C to 125°C UNIT
MIN TYP MAX MIN MAX MIN MAX
HC TYPES
VIH High-level input voltage 2 1.5 1.5 1.5 V
4.5 3.15 3.15 3.15 V
6 4.2 4.2 4.2 V
VIL Low-level input voltage 2 0.5 0.5 0.5 V
4.5 1.35 1.35 1.35 V
6 1.8 1.8 1.8 V
VOH High-level output voltage

CMOS loads

 IOH = – 20μA 2 1.9 1.9 1.9 V
IOH = – 20μA 4.5 4.4 4.4 4.4 V
IOH = – 20μA 6 5.9 5.9 5.9 V
High-level output voltage

TTL loads

 IOH = – 6mA 4.5 3.98 3.84 3.7 V
IOH = – 7.8mA 6 5.48 5.34 5.2 V
VOL Low-level output voltage

CMOS loads

 IOL = 20μA 2 0.1 0.1 0.1 V
IOL = 20μA 4.5 0.1 0.1 0.1 V
IOL = 20μA 6 0.1 0.1 0.1 V
Low-level output voltage

TTL loads

 IOL = 6mA 4.5 0.26 0.33 0.4 V
IOL = 7.8mA 6 0.26 0.33 0.4 V
II Input leakage current VCC or GND 6 ±0.1 ±1 ±1 µA
ICC Supply current VCC or GND 6 8 80 160 µA
HCT TYPES
VIH High-level input voltage 4.5 to 5.5 2 2 2 V
VIL Low-level input voltage 4.5 to 5.5 0.8 0.8 0.8 V
VOH High-level output voltage

CMOS loads

 IOH = – 20μA 4.5 4.4 4.4 4.4 V
High-level output voltage

TTL loads

 IOH = – 6mA 4.5 3.98 3.84 3.7 V
VOL Low-level output voltage

CMOS loads

 IOL = 20μA 4.5 0.1 0.1 0.1 V
Low-level output voltage

TTL loads

 IOL = 6mA 4.5 0.26 0.33 0.4 V
II Input leakage current VCC and GND 5.5 ±0.1 ±1 ±1 µA
ICC Supply Current VCC and GND 5.5 8 80 160 µA
ΔICC(1)(3) Additional quiescent device current per input pin: 1 unit load D 4.5 to 5.5 40 144 180 196 µA
CP, OE 4.5 to 5.5 150 540 675 735 µA
STR 4.5 to 5.5 100 360 450 490 µA
(1) For dual−supply systems theoretical worst case (VI = 2.4 V, VCC = 5.5 V) specification is 1.8 mA.
(2) VI = VIH or VIL, unless otherwise noted.
(3) Inputs held at VCC – 2.1.