SLUSFH4A March   2025  – July 2025 BQ25858-Q1 , BQ25858B-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Device Power-On-Reset
      2. 7.3.2  Device Power-Up From Battery Without Input Source
      3. 7.3.3  Device Power Up From Input Source
        1. 7.3.3.1 VAC Operating Window Programming (ACUV and ACOV)
        2. 7.3.3.2 MODE Pin Configuration
        3. 7.3.3.3 REGN Regulator (REGN LDO)
        4. 7.3.3.4 Compensation-Free Buck-Boost Converter Operation
          1. 7.3.3.4.1 Light-Load Operation
        5. 7.3.3.5 Switching Frequency and Synchronization (FSW_SYNC)
        6. 7.3.3.6 Device HIZ Mode
      4. 7.3.4  Power Management
        1. 7.3.4.1 Output Voltage Programming (VOUT_REG)
        2. 7.3.4.2 Output Current Programming (IOUT pin and IOUT_REG)
        3. 7.3.4.3 Dynamic Power Management: Input Voltage and Input Current Regulation
          1. 7.3.4.3.1 Input Current Regulation
            1. 7.3.4.3.1.1 IIN Pin
            2. 7.3.4.3.1.2 Multi-Level Current Limit (Overload Mode)
          2. 7.3.4.3.2 Input Voltage Regulation
        4. 7.3.4.4 Bypass Mode
      5. 7.3.5  Bidirectional Power Flow and Programmability
      6. 7.3.6  Switching Frequency Dithering Feature
      7. 7.3.7  Integrated 16-Bit ADC for Monitoring
      8. 7.3.8  Status Outputs (PG, STAT and INT)
        1. 7.3.8.1 Power Good Indicator (PG)
        2. 7.3.8.2 Converter Status Indicator (STAT Pin)
        3. 7.3.8.3 Interrupt to Host (INT)
      9. 7.3.9  Protections
        1. 7.3.9.1 Voltage and Current Monitoring
          1. 7.3.9.1.1 VAC Over-voltage Protection (VAC_OVP)
          2. 7.3.9.1.2 VAC Under-voltage Protection (VAC_UVP)
          3. 7.3.9.1.3 Reverse Mode Over-voltage Protection (REV_OVP)
          4. 7.3.9.1.4 Reverse Mode Under-voltage Protection (REV_UVP)
          5. 7.3.9.1.5 DRV_SUP Under-voltage and Over-voltage Protection (DRV_OKZ)
          6. 7.3.9.1.6 REGN Under-voltage Protection (REGN_OKZ)
        2. 7.3.9.2 Thermal Shutdown (TSHUT)
      10. 7.3.10 Serial Interface
        1. 7.3.10.1 Data Validity
        2. 7.3.10.2 START and STOP Conditions
        3. 7.3.10.3 Byte Format
        4. 7.3.10.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 7.3.10.5 Target Address and Data Direction Bit
        6. 7.3.10.6 Single Write and Read
        7. 7.3.10.7 Multi-Write and Multi-Read
    4. 7.4 Device Functional Modes
      1. 7.4.1 Host Mode and Default Mode
      2. 7.4.2 Register Bit Reset
    5. 7.5 BQ25858-Q1/858B-Q1 Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Typical Application (Buck-Boost configuration)
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 ACUV / ACOV Input Voltage Operating Window Programming
          2. 8.2.1.2.2 Switching Frequency Selection
          3. 8.2.1.2.3 Inductor Selection
          4. 8.2.1.2.4 Input (VAC) Capacitor
          5. 8.2.1.2.5 Output (VBAT) Capacitor
          6. 8.2.1.2.6 Sense Resistor (RAC_SNS and RBAT_SNS) and Current Programming
          7. 8.2.1.2.7 Converter Fast Transient Response
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Typical Application (Buck-only configuration)
        1. 8.2.2.1 Design Requirements
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • RRV|36
散热焊盘机械数据 (封装 | 引脚)
订购信息

7.3.6 Switching Frequency Dithering Feature

Normally, the IC switches in fixed frequency which can be adjusted through FSW_SYNC pin. The power converter also supports frequency dithering to improve EMI performance and help pass the IEC-CISPR 32 specification. Dithering is disabled by default as EN_DITHER=00b at startup. It can be enabled by setting EN_DITHER=01/10/11b. The switching frequency is not fixed when dithering is enabled and varies within determined range by setting EN_DITHER to 01/10/11b, which corresponds to ±2%/4%/6% switching frequency variation. A larger dithering range results in a smaller EMI noise peak, but a larger dithering range also causes slightly more output voltage ripple. Therefore, the dithering frequency range selection is a trade-off between EMI noise peak and output voltage ripple and we recommend you to choose the lowest dithering range which can pass IEC-CISPR 32 specification. The patented dithering pattern can improve EMI performance in the switching frequency up to 30-MHz range which covers the entire conductive EMI noise range.

It should be noted that the Dithering feature will not work if an external clock is provided.