SBAS523D October   2010  – September 2017 ADS7223 , ADS7263 , ADS8363

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: General
    6. 7.6  Electrical Characteristics: ADS8363
    7. 7.7  Electrical Characteristics: ADS7263
    8. 7.8  Electrical Characteristics: ADS7223
    9. 7.9  Switching Characteristics
    10. 7.10 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Analog
        1. 8.3.1.1 Analog Inputs
        2. 8.3.1.2 Analog-to-Digital Converters (ADCs)
        3. 8.3.1.3 CONVST
        4. 8.3.1.4 CLOCK
        5. 8.3.1.5 RESET
        6. 8.3.1.6 REFIOx
      2. 8.3.2 Digital
        1. 8.3.2.1 Mode Selection Pin M0 and M1
        2. 8.3.2.2 Half-Clock Mode (Default Mode After Power-Up and Reset)
        3. 8.3.2.3 Full-Clock Mode (Allowing Conversion and Data Readout Within 1 µs, Supported In Dual Output Modes)
        4. 8.3.2.4 2-Bit Counter
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Down Modes and Reset
        1. 8.4.1.1 Power-Down Mode
        2. 8.4.1.2 Sleep Mode
        3. 8.4.1.3 Auto-Sleep Mode
        4. 8.4.1.4 Reset
    5. 8.5 Programming
      1. 8.5.1 Read Data Input (RD)
      2. 8.5.2 Serial Data Outputs (SDOx)
        1. 8.5.2.1 Mode I
        2. 8.5.2.2 Mode II (Half-Clock Mode Only)
        3. 8.5.2.3 Special Read Mode II (Half-Clock Mode Only)
        4. 8.5.2.4 Mode III
        5. 8.5.2.5 Fully-Differential Mode IV (Half-Clock Mode Only)
        6. 8.5.2.6 Special Mode IV (Half-Clock Mode Only)
      3. 8.5.3 Programming the Reference DAC
    6. 8.6 Register Maps
      1. 8.6.1 Configuration (Config) Register
      2. 8.6.2 REFDAC1 and REFDAC2 Registers
      3. 8.6.3 Sequencer/FIFO (SEQFIFO) Register
      4. 8.6.4 Reference and Common-Mode Selection (REFCM) Register
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 ADS8361 Compatibility
        1. 9.1.1.1 Pinout
        2. 9.1.1.2 SDI versus A0
        3. 9.1.1.3 Internal Reference
        4. 9.1.1.4 Timing
        5. 9.1.1.5 RD
        6. 9.1.1.6 CONVST
      2. 9.1.2 Minimum Configuration Example
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Grounding
      2. 11.1.2 Digital Interface
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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6 Pin Configuration and Functions

RHB Package
32-Pin VQFN
Top View

Pin Functions

PIN TYPE(1) DESCRIPTION
NAME NO.
AGND 12, 30 P Analog ground. Connect to analog ground plane.
AVDD 13, 29 P Analog power supply, 2.7 V to 5.5 V. Decouple to AGND with a 1-μF ceramic capacitor.
BUSY 23 DO Converter busy indicator. BUSY goes high when the inputs are in hold mode and returns to low after the conversion is complete.
CHA0N/CHA0 8 AI Fully-differential inverting analog input channel A1 or pseudo-differential input A0
CHA0P/CHA1 7 AI Fully-differential noninverting analog input channel A1 or pseudo-differential input A1
CHA1N/CHA2 6 AI Fully-differential inverting analog input channel A1 or pseudo-differential input A2
CHA1P/CHA3 5 AI Fully-differential noninverting analog input channel A1 or pseudo-differential input A3
CHB0N/CHB0 4 AI Fully-differential inverting analog input channel B0 or pseudo-differential input B0
CHB0P/CHB1 3 AI Fully-differential noninverting analog input channel B0 or pseudo-differential input B1
CHB1N/CHB2 2 AI Fully-differential inverting analog input channel B1 or pseudo-differential input B2
CHB1P/CHB3 1 AI Fully-differential noninverting analog input channel B1 or pseudo-differential input B3
CLOCK 22 DI External clock input. The range is 0.5 MHz to 20 MHz in half-clock mode, or 1 MHz to 40 MHz in full-clock mode.
CMA 31 AI Common-mode voltage input for channels Ax (in pseudo-differential mode only).
CMB 32 AI Common-mode voltage input for channels Bx (in pseudo-differential mode only).
CONVST 19 DI Conversion start. The ADC switches from sample into hold mode on the rising edge of CONVST. Thereafter, the conversion starts with the next rising edge of the CLOCK pin.
CS 21 DI Chip select. When this pin is low, the SDOx, SDI, and RD pins are active; when this pin is high, the SDOx outputs are 3-stated, and the SDI and RD inputs are ignored.
DGND 28 P Digital ground. Connect to digital ground plane.
DVDD 27 P Digital supply, 2.3 V to 5.5 V. Decouple to DGND with a 1-μF ceramic capacitor.
M0 17 DI Mode pin 0. Selects analog input channel mode (see Table 5).
M1 16 DI Mode pin 1. Selects the digital output mode (see Table 5).
NC 14, 15, 26 NC This pin is not internally connected.
RD 20 DI Read data. Synchronization pulse for the SDOx outputs and SDI input. RD only triggers when CS is low.
REFIO1 9 AIO Reference voltage input/output 1. A ceramic capacitor of 22 µF connected to RGND is required.
REFIO2 10 AIO Reference voltage input/output 2. A ceramic capacitor of 22 µF connected to RGND is required.
RGND 11 P Reference ground. Connect to analog ground plane with a dedicated via.
SDI 18 DI Serial data input. This pin is used to set up of the internal registers, and can also be used in ADS8361-compatible manner. The data on SDI are ignored when CS is high.
SDOA 25 DO Serial data output for converter A. 3-state when CS is high.
SDOB 24 DO Serial data output for converter B. Active only if M1 is low. 3-state when CS is high.
(1) AI = analog input, AIO = analog input/output, DI = digital input, DO = digital output, DIO = digital input/output, P = power supply, NC = not connected.