SBAS523D October   2010  – September 2017 ADS7223 , ADS7263 , ADS8363

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: General
    6. 7.6  Electrical Characteristics: ADS8363
    7. 7.7  Electrical Characteristics: ADS7263
    8. 7.8  Electrical Characteristics: ADS7223
    9. 7.9  Switching Characteristics
    10. 7.10 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Analog
        1. 8.3.1.1 Analog Inputs
        2. 8.3.1.2 Analog-to-Digital Converters (ADCs)
        3. 8.3.1.3 CONVST
        4. 8.3.1.4 CLOCK
        5. 8.3.1.5 RESET
        6. 8.3.1.6 REFIOx
      2. 8.3.2 Digital
        1. 8.3.2.1 Mode Selection Pin M0 and M1
        2. 8.3.2.2 Half-Clock Mode (Default Mode After Power-Up and Reset)
        3. 8.3.2.3 Full-Clock Mode (Allowing Conversion and Data Readout Within 1 µs, Supported In Dual Output Modes)
        4. 8.3.2.4 2-Bit Counter
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Down Modes and Reset
        1. 8.4.1.1 Power-Down Mode
        2. 8.4.1.2 Sleep Mode
        3. 8.4.1.3 Auto-Sleep Mode
        4. 8.4.1.4 Reset
    5. 8.5 Programming
      1. 8.5.1 Read Data Input (RD)
      2. 8.5.2 Serial Data Outputs (SDOx)
        1. 8.5.2.1 Mode I
        2. 8.5.2.2 Mode II (Half-Clock Mode Only)
        3. 8.5.2.3 Special Read Mode II (Half-Clock Mode Only)
        4. 8.5.2.4 Mode III
        5. 8.5.2.5 Fully-Differential Mode IV (Half-Clock Mode Only)
        6. 8.5.2.6 Special Mode IV (Half-Clock Mode Only)
      3. 8.5.3 Programming the Reference DAC
    6. 8.6 Register Maps
      1. 8.6.1 Configuration (Config) Register
      2. 8.6.2 REFDAC1 and REFDAC2 Registers
      3. 8.6.3 Sequencer/FIFO (SEQFIFO) Register
      4. 8.6.4 Reference and Common-Mode Selection (REFCM) Register
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 ADS8361 Compatibility
        1. 9.1.1.1 Pinout
        2. 9.1.1.2 SDI versus A0
        3. 9.1.1.3 Internal Reference
        4. 9.1.1.4 Timing
        5. 9.1.1.5 RD
        6. 9.1.1.6 CONVST
      2. 9.1.2 Minimum Configuration Example
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Grounding
      2. 11.1.2 Digital Interface
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.