ZHCS179F August   2011  – July 2016

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Inside the INA826
      2. 8.3.2  Setting the Gain
        1. 8.3.2.1 Gain Drift
      3. 8.3.3  Offset Trimming
      4. 8.3.4  Input Common-Mode Range
      5. 8.3.5  Input Protection
      6. 8.3.6  Input Bias Current Return Path
      7. 8.3.7  Reference Terminal
      8. 8.3.8  Dynamic Performance
      9. 8.3.9  Operating Voltage
        1. 8.3.9.1 Low-Voltage Operation
      10. 8.3.10 Error Sources
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 Circuit Breaker
      2. 9.3.2 Programmable Logic Controller (PLC) Input
      3. 9.3.3 Using TINA-TI SPICE-Based Analog Simulation Program with the INA826
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 CMRR vs Frequency
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档
    2. 12.2 接收文档更新通知
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 Glossary
  13. 13机械、封装和可订购信息

11 Layout

11.1 Layout Guidelines

Attention to good layout practices is always recommended. Keep traces short and, when possible, use a printed circuit board (PCB) ground plane with surface-mount components placed as close to the device pins as possible. Place 0.1-μF bypass capacitors close to the supply pins. Apply these guidelines throughout the analog circuit to improve performance and provide benefits such as reducing the electromagnetic-interference (EMI) susceptibility.

The INA826EVM is intended to provide basic functional evaluation of the INA826. An image of the INA826EVM is provided in Figure 73. The INA826EVM is also available for purchase through the TI eStore.

11.1.1 CMRR vs Frequency

The INA826 pinout is optimized for achieving maximum CMRR performance over a wide range of frequencies. However, care must be taken to ensure that both input paths are well-matched for source impedance and capacitance to avoid converting common-mode signals into differential signals. In addition, parasitic capacitance at the gain-setting pins can also affect CMRR over frequency. For example, in applications that implement gain switching using switches or PhotoMOS® relays to change the value of RG, choose the component so that the switch capacitance is as small as possible.

11.2 Layout Example

INA826 example_layout_sbos562.gif Figure 73. INA826 Example Layout

The INA826EVM provides the following features:

  • Intuitive evaluation with silkscreen schematic
  • Easy access to nodes with surface-mount test points
  • Advanced evaluation with two prototype areas
  • Reference voltage source flexibility
  • Convenient input and output filtering