ZHCADT8 December 2023 TAA5212 , TAC5111 , TAC5112 , TAC5211 , TAC5212 , TAD5112 , TAD5212
3.3.3 自定义模式（主 FS - 较低速率）
图 3-10 显示了该用例的方框图，其中包含 PASI 和 SASI 映射。PASI 以 16 KHz 运行，SASI 以 48 KHz 运行。在该用例中，以主 Fs（较低速率）对模拟 (MIC) 输入进行采样。在 DAC 侧，SASI RX 数据可以在 DAC 输出（扬声器）之前与 PASI RX 数据进行混频。
图 3-10 自定义模式图下文显示了 PASI 和 SASI 的 Audio Precision APx555 配置。在该测试用例中，混频器系数保持为默认值（满量程），输入电平会被调整为不超过允许的最大电平（例如 -6dBrG），而不是 0dBrG。
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PASI APx555： 发生器： 模拟输出 (MIC)：750Hz 正弦波，-1dBrG (0dBrG = 2Vrms) 分析器： 输入 1：PASI Tx 的数字音频，其中 Fs = 16KHz、32 位深度 输入 2：DAC 输出（扬声器）的模拟输入 SASI APx555： 发生器： 数字输出∶1KHz 正弦波，-6dBFS 分析器： 输入 1：SASI Tx 的数字音频，其中 Fs = 48KHz、TDM、32 位深度 |
##### PASI lower rate than SASI ADC and DAC SRC Testing ######
# Target Mode, TDM, 32-bit
# Primary and Secondary ASI, multiple of 48KHz Sampling
# GPIO2=Secondary FSYNC, GPIO1=Secondary BCLK, GPI1=Secondary DIN, GPO1=Secondary DOUT for 4x4
#
w a0 00 00 # Set page 0
w a0 01 01 # Software Reset
w a0 02 09 # Wake up with AVDD > 2v and all VDDIO level
w a0 0a 10 # GPIO1 as input
w a0 0b 10 # GPIO2 as input
w a0 0d 02 # GPI1 as input
w a0 0c 71 # GPO1 as Secondary DOUT
w a0 11 a2 # Enable PASI DIN and Set GPI2A as Secondary FSYNC and GPIO1 as Secondary BCLK
w a0 12 60 # Set GPI1A as Secondary DIN
w a0 18 00 # Enable both Primary and Secondary ASI as independent
w a0 34 40 # PASI BCLK is the input clock source
w a0 19 00 # 1 data input and 1 data output for PASI and SASI
w a0 1a 30 # PASI TDM, 32 bit format
w a0 1e 20 # PASI DOUT Ch1 on TDM slot 0
w a0 1f 21 # PASI DOUT Ch2 on TDM slot 1
w a0 28 20 # PASI DIN Ch1 on TDM slot 0
w a0 29 21 # PASI DIN Ch2 on TDM slot 1
w a0 00 03 # Set page 3
w a0 1a 30 # SASI TDM, 32 bit format
w a0 1e 20 # SASI DOUT Ch1 on TDM slot 0
w a0 1f 21 # SASI DOUT Ch2 on TDM slot 1
w a0 28 20 # SASI DIN Ch1 on TDM slot 0
w a0 29 21 # SASI DIN Ch2 on TDM slot 1
w a0 00 01 # Set page 1
w a0 17 40 # SR-Converter without auto-detect
w a0 18 80 # Use PASI Fs as Main Fs
w a0 2c 80 # Enable DAC ASI Mixer
w a0 00 00 # Set page 0
w a0 50 00 # ADC Ch1 diff input, 5KOhm, 2Vrms ac-coupled, audio band
w a0 55 00 # ADC Ch2 diff input, 5KOhm, 2Vrms ac-coupled, audio band
w a0 64 20 # Configure OUT1P/M as differential from DAC1
w a0 65 20 # Configure OUT1P LINEOUT 0dB audio band
w a0 66 20 # Configure OUT1M LINEOUT 0dB 2Vrms Differential
w a0 6b 20 # Configure OUT2P/M as differential from DAC2
w a0 6c 20 # Configure OUT2P LINEOUT 0dB audio band
w a0 6d 20 # Configure OUT2M LINEOUT 0dB 2Vrms Differential
w a0 76 cc # Enable Input and Output Ch1 and Ch2
w a0 78 e0 # Power up ADC, DAC and MICBIAS
