ZHCACS4 june 2023 AM6442
这是整个补丁。它会影响以下文件:
diff --git a/common/autoboot.c b/common/autoboot.c
index e628baffb8..fcfed76438 100644
--- a/common/autoboot.c
+++ b/common/autoboot.c
@@ -4,6 +4,13 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
+#define TI_RTI_WATCHDOG_PATCH
+
+#ifdef TI_RTI_WATCHDOG_PATCH
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#endif
+
#include <common.h>
#include <autoboot.h>
#include <bootretry.h>
@@ -246,13 +253,55 @@ static int abortboot_key_sequence(int bootdelay)
return abort;
}
+#ifdef TI_RTI_WATCHDOG_PATCH
+static CTRL_and_RTI_Clock_Counter_Enabled(void)
+{
+ int checkreg = 0;
+ /* TI: The below 2 lines are to unlock the MMR register. */
+ /* TI: Lock2/Kick0, Proxy physical 0. = 9008, to write the register 0x68EF3490 is "unlock". */
+ writel(0x68EF3490,0x43009008);
+ /* TI: Lock2/Kick1, Proxy physical 0. = 900C, to write the register 0xD172BC5A is "unlock". */
+ writel(0xD172BC5A,0x4300900C);
+ /* TI: Check the clk source of WWD0 before writing. */
+ checkreg = readl(0x43008380);
+ printf("TI : RTI check before writing 0x43008380 clk_src reg == 0x%x\n", checkreg);
+ /* TI: Set the clk src as 32k, IE: WWD0 Clock select, Proxy physical 0, the register is 0x43008380. Write value 0x3 is to set the clk src as 32KHz.) */
+ writel(0x3,0x43008380);
+ /* TI: double check the clk source of WWD0 value again. */
+ checkreg = readl(0x43008380);
+ printf("TI : RTI check after writing 0x43008380 clk_src reg == 0x%x\n", checkreg);
+ /* TI: The RTI_WWDRXNCTR is 0xE0000a4, Digital Windowed Watchdog Reaction. */
+ /* TI: Ah = The windowed watchdog will generate a non-maskable interrupt to the CPU if the watchdog is serviced outside the time window
+ defined by the configuration, or if the watchdog is not serviced at all. Writing any other value will cause a system reset if the watchdog is
+ serviced outside the time window defined by the configuration, or if the watchdog is not serviced at all. */
+ writel(0xa,0xe0000a4);
+ /* TI: double Check the RTI_WWDRXNCTR 0xE0000a4 value. */
+ checkreg = readl(0xE0000a4);
+ printf("TI : RTI check 0xe0000a4 reg == 0x%x\n", checkreg);
+ /* TI: Check the RTI_DWDPRL 0xE000094 value. */
+ checkreg = readl(0xE000094);
+ printf("TI : RTI check before writing 0xe000094 timing window reg == 0x%x\n", checkreg);
+ /* TI: Write the timeing window to the register RTI_DWDPRL, 0x9 is about 4~5 seonds, this just fit the uboot complete,
+ in this example, we expect the WDT takes effect after 4~5 seconds.) */
+ writel(0x9 ,0xE000094);
+ checkreg = readl(0xE000094);
+ printf("TI : RTI check after writing 0xe000094 timing window reg == 0x%x\n", checkreg);
+ /* TI: WDT CLock coutner register is RTI_DWDCTRL, set this value: A98559DA to let the Watchdog counter enabled. */
+ writel(0xA98559DA,0xE000090); /* TI: Clock counter enabled. */
+ udelay(4000); /* TI: Adding this delay for letting this function to take effect. */
+}
+
+#endif
+
static int abortboot_single_key(int bootdelay)
{
int abort = 0;
unsigned long ts;
-
+#ifdef TI_RTI_WATCHDOG_PATCH
+ /* TI: Set the boot delay as 0 to accelerate the next system reset faster, user can adjust this value by himself. */
+ bootdelay = 0;
+#endif
printf("Hit any key to stop autoboot: %2d ", bootdelay);
-
/*
* Check if key already pressed
*/
@@ -262,6 +311,10 @@ static int abortboot_single_key(int bootdelay)
abort = 1; /* don't auto boot */
}
+#ifdef TI_RTI_WATCHDOG_PATCH
+ printf("TI : abort:0x%x\n", abort);
+#endif
+
while ((bootdelay > 0) && (!abort)) {
--bootdelay;
/* delay 1000 ms */
@@ -283,6 +336,21 @@ static int abortboot_single_key(int bootdelay)
printf("\b\b\b%2d ", bootdelay);
}
+#ifdef TI_RTI_WATCHDOG_PATCH
+ if(abort !=1)
+ {
+ int temp32 = 0;
+ temp32 = readl(0x04518170);
+ printf("TI : This bit should be zero, check 0x04518170 reg == 0x%x\n", temp32);
+ printf("TI : in autoboot.c Enable RTI Clock.\n");
+ CTRL_and_RTI_Clock_Counter_Enabled();
+ /* TI: Disable the eth_initialize initialized in common/board_r.c, put to here. */
+ /* do the CTRL_and_RTI_Clock_Counter_Enabled first, then, do the eth_initialize in order to prevent the ETH stuck. */
+ puts("Net: ");
+ eth_initialize();
+ }
+#endif
+
putc('\n');
return abort;
@@ -386,3 +454,4 @@ void autoboot_command(const char *s)
run_command_list(s, -1, 0);
}
}
+
diff --git a/common/board_r.c b/common/board_r.c
index 29dd7d26d9..b4e249056d 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -622,11 +622,18 @@ static int initr_bbmii(void)
}
#endif
+#define TI_RTI_WATCHDOG_PATCH
+
#ifdef CONFIG_CMD_NET
static int initr_net(void)
{
+#ifdef TI_RTI_WATCHDOG_PATCH
+ /* TI: moved this eth_initialize to autoboot.c for RTI_WATCHDOG_PATCH. */
+#else
puts("Net: ");
eth_initialize();
+#endif
+
#if defined(CONFIG_RESET_PHY_R)
debug("Reset Ethernet PHY\n");
reset_phy();