The TRNG has the following features:
- The TRNG is based on 24 ring oscillators (shot noise) that create entropy. To generate this entropy, the system needs a minimum of 28 system clock cycles (for reference) to produce the first random output. Then the TRNG takes a minimum of 26 system clock cycles to produce each subsequent 64-bit random number.
- Startup time and entropy regeneration time can be controlled between 28 and 224 sampling clock cycles, and entropy regeneration time can be controlled between 26 and 224 sampling clock cycles to adapt entropy accumulation time to basic entropy generation rate. Entropy regeneration time can be tailored in a trade-off between speed of random number generation and amount of entropy in each of those random numbers.
- The TRNG architecture is based on linear-feedback shift register (LFSR) in association with a nonlinear entropic hasher.
- The random numbers are accessible to the applications in a 64-bit read-only register. When the register is read, the TRNG immediately generates a new value, which is then shifted into the output register when ready.
- If the ready value is not read within a maximum time-out window, the TRNG is set to idle mode.
- The TRNG provides a built-in self-test that checks the number of consecutive bits sampled to provide the statistical robustness required by FIPS 140. System alarms are generated based on feedback from this test.
- The internal power-saving mode is built to carefully manage the entropy previously generated.
- The interrupt channel allows the transfer of 32-bit data blocks.