SPRACR2 March   2020 TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1

 

  1.   Enabling Peripheral Expansion Applications Using the HIC
    1.     Trademarks
    2. 1 Introduction
    3. 2 HIC Configurations Overview
      1. 2.1 Access Modes
      2. 2.2 Data Width Selection
      3. 2.3 Base Address Selection
      4. 2.4 Read/write I/O Configuration
      5. 2.5 Device to Host Interrupts
        1. 2.5.1 Device Internal Events
        2. 2.5.2 Software Interrupts
    4. 3 Hardware Considerations
      1. 3.1 Common Signal Names
      2. 3.2 Address Pin Mapping
      3. 3.3 BASESEL Pin Mapping
    5. 4 Example Configuration for Pin Constrained Applications
      1. 4.1 Test Setup
      2. 4.2 Test Description
    6. 5 Example Configuration for Performance-Critical Applications
      1. 5.1 Test Setup
      2. 5.2 Test Description
    7. 6 Handling Device Reset and Low-Power Conditions
    8. 7 References
  2.   A Address Translation for Different Data Width Modes
    1.     A.1 Base Address and Offset Address Configuration

1 Introduction

The Host Interface Controller (HIC) provides an asynchronous interface through which an external Host processor can access most of the C2000 device's peripherals.

NOTE

This document includes HIC usage examples using the F28002x Device, but the concepts also apply to other C2000 devices that support the HIC. Throughout the document, the designation of “Host” will refer to the external Host processor, while the designation of “Device” will refer to the Device with support for the HIC.

Through the HIC, the Host can use the Device as a peripheral expander, by taking advantage of the C2000’s differentiated features. For example, Figure 1 shows how the Host with an Asynchronous RAM interface can use the Device as a peripheral bridge for high-speed communication across isolation using the FSI.

spracr2-hic-bridge-for-fsi-applications.gifFigure 1. HIC Bridge for FSI Applications

Another application of the HIC could be to take advantage of the Configurable Logic Block (CLB) peripheral that is available with the C2000 family of devices. The CLB enables custom logic implementation and augments the existing C2000 peripheral set, thereby eliminating or reducing the need for FPGA, CPLD, or external logic components to achieve the same results. There are numerous solutions that can be implemented with the CLB, one of which is the absolute encoder protocol implementation to interface with the position sensors in an industrial drive control system. For the encoder protocols that are supported by the CLB, see the Position manager technology. The HIC can be used as a bridge for the Host to interface with the position sensors as shown in Figure 2.

spracr2-hic-bridge-for-position-encoder-applications.gifFigure 2. HIC Bridge for Position Encoder Applications

In a similar fashion, F28002x can be used as a motor controller by the Host taking advantage of the peripherals like PWMs, ADCs and CMPSS. Position reference data can be sent from the Host to the F28002x and the feedback data like motor current, present position can be accessed via ADC.

spracr2-hic-bridge-for-motor-control-applications.gifFigure 3. HIC Bridge for Motor Control Applications

HIC applications are not just limited to peripheral expansion; the Host can offload math intensive computations to the C2000 Device whose enhanced instruction set can be leveraged to increase the system performance in real-time applications. To know about different performance enhanced instruction sets and accelerators supported by C2000 family of devices, see the Accelerators: Enhancing the Capabilities of the C2000 MCU Family Technical Brief.