ZHCSKL2A December   2019  – May 2022 TUSS4470

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power-Up Characteristics
    6. 6.6  Transducer Drive
    7. 6.7  Receiver Characteristics
    8. 6.8  Echo Interrupt Comparator Characteristics
    9. 6.9  Digital I/O Characteristics
    10. 6.10 Switching Characteristics
    11. 6.11 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Excitation Power Supply (VDRV)
      2. 7.3.2 Burst Generation
        1. 7.3.2.1 Burst Generation Diagnostics
      3. 7.3.3 Direct Transducer Drive
      4. 7.3.4 Analog Front End
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
    6. 7.6 Register Maps
      1. 7.6.1 REG_USER Registers
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Transducer Drive Configuration Options
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Transducer Driving Voltage
          2. 8.2.1.2.2 Transducer Driving Frequency
          3. 8.2.1.2.3 Transducer Pulse Count
        3. 8.2.1.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 接收文档更新通知
    2. 11.2 支持资源
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 术语表
  12. 12Mechanical, Packaging, and Orderable Information

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7.3.3 Direct Transducer Drive

Figure 7-5 shows the internal structure for driving an ultrasonic transducer connected directly to the device output using an H-bridge output stage. This configuration drives 2 × VVDRV as the peak-to-peak voltage across the transducer. The voltage on VDRV pin can be set as described in the Section 7.3.1 section.

GUID-EBB7B220-C96E-4817-9C51-CAE4A429F7CF-low.gifFigure 7-5 Direct Drive Configuration Using Internal FETs

Figure 7-5 shows the most common application case for the TUSS4470 device, in which the output driver pulses the two half-bridges out-of-phase. It is also possible to use the driver in half-bridge mode by setting the HALF_BRG_MODE bit. In this mode, only VVDRV is applied across the transducer. This mode is useful for transducers where one side of the membrane must be always grounded.

The device can also be configured as a pre-driver to drive external FETs or BJTs to drive higher current and voltage into the primary side of the transformer, as shown in Figure 7-6, by setting the PRE_DRIVER_MODE bit. The high-side and low-side devices are used to drive the external low-side drivers. The VDRV voltage level can be configured to ensure that the OUTA and OUTB voltages do not violate the VGS or VBE specification for external the FET or BJT, respectively. In the configuration shown in Figure 7-6, it is possible to use a voltage (VBOOST) which is higher than the supply of the system for generating higher voltage across the transducer.

Refer to Section 8 for an application diagram and information on how the polarity and state of OUTA and OUTB pins are defined with respect to IO1 and IO2 pin states and other register settings.

GUID-2213E870-CE60-4AC1-9AE4-9E145539FD14-low.gifFigure 7-6 Center-Tap Transformer Drive Using External FETs