SLVSAY9F December   2012  – March 2016 TPS65320-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Buck Regulator
        1. 7.3.1.1  Fixed-Frequency PWM Control
        2. 7.3.1.2  Slope Compensation Output
        3. 7.3.1.3  Pulse-Skip Eco-mode™ Control Scheme
        4. 7.3.1.4  Dropout Operation and Bootstrap Voltage (BOOT)
        5. 7.3.1.5  Error Amplifier
        6. 7.3.1.6  Voltage Reference
        7. 7.3.1.7  Adjusting the Output Voltage
        8. 7.3.1.8  Soft-Start and Tracking Pin (SS/TR)
        9. 7.3.1.9  Overload Recovery Circuit
        10. 7.3.1.10 Constant Switching Frequency and Timing Resistor (RT/CLK Pin)
        11. 7.3.1.11 Overcurrent Protection and Frequency Shift
        12. 7.3.1.12 Selecting the Switching Frequency
        13. 7.3.1.13 How to Interface to RT/CLK Pin
        14. 7.3.1.14 Overvoltage Transient Protection
        15. 7.3.1.15 Thermal Shutdown
        16. 7.3.1.16 Small-Signal Model for Loop Response
        17. 7.3.1.17 Simple Small-Signal Model for Peak-Current Mode Control
        18. 7.3.1.18 Small-Signal Model for Frequency Compensation
      2. 7.3.2 LDO Regulator
        1. 7.3.2.1 Charge-Pump Operation
        2. 7.3.2.2 Low-Voltage Tracking
        3. 7.3.2.3 Power-Good Output, nRST
      3. 7.3.3 Enable and Undervoltage Lockout
    4. 7.4 Device Functional Modes
      1. 7.4.1 Modes of Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 2.2-MHz Switching Frequency, 9-V to 16-V Input, 5-V Output Buck Regulator, 3.3-V Output LDO Regulator
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Switching Frequency Selection for the Buck Regulator
          2. 8.2.1.2.2  Output Inductor Selection for the Buck Regulator
          3. 8.2.1.2.3  Output Capacitor Selection for the Buck Regulator
          4. 8.2.1.2.4  Catch Diode Selection for the Buck Regulator
          5. 8.2.1.2.5  Input Capacitor Selection for the Buck Regulator
          6. 8.2.1.2.6  Soft-Start Capacitor Selection for the Buck Regulator
          7. 8.2.1.2.7  Bootstrap Capacitor Selection for the Buck Regulator
          8. 8.2.1.2.8  Output Voltage and Feedback Resistor Selection for the Buck Regulator
          9. 8.2.1.2.9  Frequency Compensation Selection for the Buck Regulator
          10. 8.2.1.2.10 LDO Regulator
          11. 8.2.1.2.11 Power Dissipation
            1. 8.2.1.2.11.1 Power Dissipation Losses of the Buck Regulator
          12. 8.2.1.2.12 Power Dissipation Losses of the LDO Regulator
          13. 8.2.1.2.13 Total Device Power Dissipation Losses and Junction Temperature
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Design Example With 500-kHz Switching Frequency
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Selecting the Switching Frequency
          2. 8.2.2.2.2 Output Inductor Selection
          3. 8.2.2.2.3 Output Capacitor
          4. 8.2.2.2.4 Compensation
        3. 8.2.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Inductor (L)
      2. 10.1.2 Input Filter Capacitors (CI)
      3. 10.1.3 Resistive Feedback Networks
      4. 10.1.4 Traces and Ground Plane
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resource
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • PWP|14
散热焊盘机械数据 (封装 | 引脚)
订购信息

4 Revision History

Changes from E Revision (December 2015) to F Revision

  • Added the VIN – VIN_LDO supply input parameter back to the Absolute Maximum Ratings tableGo
  • Changed the Buck-Regulator Output Voltage, Buck-Regulator Feedback-Voltage Reference (V(FB1)) vs Junction Temperature, LDO-Regulator Load Regulation, LDO-Regulator Dropout Voltage vs Load Current, and LDO-Regulator Feedback-Voltage Reference (V(FB2)) vs Junction Temperature graphs in the Typical Characteristics section Go
  • Updated the LDO Regulator section Go

Changes from D Revision (June 2015) to E Revision

  • Updated the function of the BOOT pin Go
  • Deleted the VIN – VIN_LDO supply input parameter from the Absolute Maximum Ratings tableGo

Changes from C Revision (March 2015) to D Revision

  • Changed nRST pin description from open-drain to push-pull in the Pin Functions table Go
  • Changed the TJ value in the condition statement of the Electrical Characteristics from –150°C to –40°C to 150°C Go

Changes from B Revision (September 2013) to C Revision

  • Changed the ESD Ratings table, Feature Description section, Device Functional Modes section, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go
  • Updated the Applications sectionGo
  • Updated Features and Description sections Go
  • Changed the MIN value for the VIN_LDO supply input from 3.6 to 3 in the Recommended Operating Conditions table Go
  • Changed the MAX value for the shutdown supply current from 5 to 7 Go
  • Added the Initial start-up voltage parameter Go
  • Changed the MIN value of the Internal UVLO rising threshold parameter from 2.5 to 2.2 Go
  • Changed the MIN value of the Operating input voltage (VIN_LDO) from 4 to 3 Go
  • Updated the FB2 voltage reference test condition Go
  • Changed the MAX value of the Quiescent current parameter from 40 to 75 and add TJ to test condition Go
  • Added the V(LDO_OUT) value to the Output capacitor parameter test conditionsGo
  • Changed the TYP value for the Thermal-shutdown trip point from 170 to 155 Go
  • Changed the minimum value of the soft-start capacitor from 0.47 nF to 1 nF in the Soft-Start and Tracking Pin (SS/TR) section Go
  • Changed the 300-kHz switching frequency application to 500-kHz switching frequency Design Example With 300-kHz Switching Frequency section Go

Changes from A Revision (April 2013) to B Revision

  • Deleted the word, Codec, from document titleGo
  • Changed first bullet item in APPLICATIONS from Qualified for Automotive Applications to AutomotiveGo
  • Added min value for ISS parameter in ELECTRICAL CHARACTERISTICS tableGo
  • Added test condition to Output high parameter under RESET (nRST PIN) in ELECTRICAL CHARACTERISTICS tableGo
  • Added push-pull stage and nRS release text to Power-Good Output, nRST sectionGo