ZHCSG38A March   2017  – November 2022 TPS65263-1Q1

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Adjusting the Output Voltage
      2. 7.3.2  Enable and Adjusting UVLO
      3. 7.3.3  Soft-Start Time
      4. 7.3.4  Power-Up Sequencing
      5. 7.3.5  V7V Low-Dropout Regulator and Bootstrap
      6. 7.3.6  Out-of-Phase Operation
      7. 7.3.7  Output Overvoltage Protection (OVP)
      8. 7.3.8  PSM
      9. 7.3.9  Slope Compensation
      10. 7.3.10 Overcurrent Protection
        1. 7.3.10.1 High-Side MOSFET Overcurrent Protection
        2. 7.3.10.2 Low-Side MOSFET Overcurrent Protection
      11. 7.3.11 Power Good
        1. 7.3.11.1 Adjustable Switching Frequency
      12. 7.3.12 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Serial Interface Description
      2. 7.4.2 I2C Update Sequence
    5. 7.5 Register Maps
      1. 7.5.1 VOUT2_SEL: Vout2 Voltage Selection Register (Address = 0x01H)
      2. 7.5.2 VOUT1_COM: Buck1 Command Register (offset = 0x03H)
      3. 7.5.3 VOUT2_COM: Buck2 Command Register (offset = 0x04H)
      4. 7.5.4 VOUT3_COM: Buck3 Command Register (offset = 0x05H)
      5. 7.5.5 SYS_STATUS: System Status Register (offset = 0x06H)
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Inductor Selection
        2. 8.2.2.2 Output Capacitor Selection
        3. 8.2.2.3 Input Capacitor Selection
        4. 8.2.2.4 Loop Compensation
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 接收文档更新通知
    2. 9.2 支持资源
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 术语表
  10. 10Mechanical, Packaging, and Orderable Information

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7.3.2 Enable and Adjusting UVLO

The ENx pin provides electrical on and off control of the device. After the ENx pin voltage exceeds the threshold voltage, the device starts operation. If each ENx pin voltage is pulled below the threshold voltage, the regulator stops switching and enters a low Iq state.

The EN pin has an internal pullup current source, allowing the user to float the EN pin for enabling the device. If an application requires controlling the EN pin, use open-drain or open-collector output logic to interface with the pin.

The device implements internal UVLO circuitry on the VIN pin. The device is disabled when the VIN pin voltage falls below the internal VIN UVLO threshold. The internal VIN UVLO threshold has a hysteresis of 500 mV. If an application requires either a higher UVLO threshold on the VIN pin or a secondary UVLO on the PVINx in split rail applications, then the user can configure the ENx pin as shown in Figure 7-3, Figure 7-4, and Figure 7-5. When using the external UVLO function, TI recommends to set the hysteresis >500 mV.

The EN pin has a small pullup current, Ip, which sets the default state of the pin to enable when no external components are connected. The pullup current is also used to control the voltage hysteresis for the UVLO function because it increases by Ih after the EN pin crosses the enable threshold. The UVLO thresholds can be calculated using Equation 2 and Equation 3.

Equation 2. GUID-82391F23-07ED-4663-83D3-1B14E9CCB73D-low.gif
Equation 3. GUID-17B3ED16-3F43-4B19-812C-83D68386F42A-low.gif

where

  • Ih = 3 µA
  • Ip = 3.9 µA
  • VENRISING = 1.2 V
  • VENFALLING = 1.15 V
GUID-92BE0A36-8A09-41DD-8FC3-1BF87B1C7E63-low.gifFigure 7-3 Adjustable VIN UVLO
GUID-4BAF1AB6-CDC9-4C05-9DEC-78F371554B5B-low.gifFigure 7-5 Adjustable VIN and PVIN UVLO
GUID-0FBD1A27-A526-4E65-B5EC-4CA4DA24FB69-low.gifFigure 7-4 Adjustable PVIN UVLO, VIN > 4 V