SLVS887C April   2009  – August 2014 TPS53114

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematics
  5. 5 Revision History
  6. 6 Pin Configurations and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  PWM Operation
      2. 8.3.2  Drivers
      3. 8.3.3  PWM Frequency and Adaptive On-time Control
      4. 8.3.4  5-Volt Regulator
      5. 8.3.5  Soft Start
      6. 8.3.6  Pre-bias Support
      7. 8.3.7  Switching Frequency Selection
      8. 8.3.8  Output Discharge Control
      9. 8.3.9  Over Current Protection
      10. 8.3.10 Over/under Voltage Protection
      11. 8.3.11 UVLO Protection
      12. 8.3.12 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 350-kHz Operation Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Choose Inductor
        2. 9.2.2.2 Choose Output Capacitor
        3. 9.2.2.3 Choose Input Capacitor
        4. 9.2.2.4 Choose Bootstrap Capacitor
        5. 9.2.2.5 Choose VREG5 and V5FILT Capacitors
        6. 9.2.2.6 Choose Output Voltage Set Point Resistors
        7. 9.2.2.7 Choose Over Current Set Point Resistor From: IOCL + To: IOCL - minus VOCLoff
        8. 9.2.2.8 Choose Soft Start Capacitor
        9. 9.2.2.9 Choose Package Option
      3. 9.2.3 350 kHz Application Curves
    3. 9.3 700 kHz Operation Application
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
      3. 9.3.3 700 kHz Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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11 Layout

11.1 Layout Guidelines

  • Keep the input switching current loop as small as possible.
  • Place the input capacitor (C3) close to the top switching FET.
  • Place the input capacitor (C4) close to the IC VIN pin.
  • The output current loop should also be kept as small as possible.
  • Keep the SW node as physically small and short as possible as to minimize parasitic capacitance and inductance and to minimize radiated emissions.
  • Independent connections should be brought from the output to the feedback pin (VFB) and VO pin of the device.
  • Keep analog and non-switching components away from switching components.
  • Terminate the feedback resistor divider (R2), slow start capacitor C7), CER pin, V5FILT capacitor (C6) and TRIP resistor (R3) to signal ground (SGND).
  • Connect the signal ground (SGND) copper area to the GND pin at the GND pin.
  • Make a single point connection from the signal ground to power ground directly under the IC as shown.
  • Do not allow switching current to flow under the device.

11.2 Layout Example

layout_slvs887.gifFigure 22. Typical TPS53114 Layout