ZHCSCL1A June   2014  – June 2014 TPS22962

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用范围
  3. 3 说明
  4. 4 简化电路原理图
  5. 5 修订历史记录
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics, VBIAS = 5.0 V
    6. 7.6 Electrical Characteristics, VBIAS = 2.5 V
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 On/off Control
      2. 8.3.2 Input Capacitor (CIN)
      3. 8.3.3 Output Capacitor (CL)
      4. 8.3.4 VIN and VBIAS Voltage Range
    4. 8.4 Device Functional Modes
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 VIN to VOUT Voltage Drop
        2. 9.2.2.2 Inrush Current
        3. 9.2.2.3 Thermal Considerations
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 术语表
  13. 13机械封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

9 Applications and Implementation

9.1 Application Information

This section will highlight some of the design considerations when implementing this device in various applications. A PSPICE model for this device is also available in the product page of this device on www.ti.com for further aid.

9.2 Typical Application

This application demonstrates how the TPS22962 can be used to power downstream modules with large capacitances. The example below is powering a 100-µF capacitive output load.

Schematic_SLVSCJ7.gifFigure 32. Typical Application Schematic for Powering a Downstream Module

9.2.1 Design Requirements

For this design example, use the following as the input parameters.

Table 2. Design Parameters

DESIGN PARAMETER EXAMPLE VALUE
VIN 5.0 V
VBIAS 5.0 V
Load current 10 A

9.2.2 Detailed Design Procedure

To begin the design process, the designer needs to know the following:

  • VIN voltage
  • VBIAS voltage
  • Load current

9.2.2.1 VIN to VOUT Voltage Drop

The VIN to VOUT voltage drop in the device is determined by the RON of the device and the load current. The RON of the device depends upon the VIN and VBIAS conditions of the device. Refer to the RON specification of the device in the Electrical Characteristics table of this datasheet. Once the RON of the device is determined based upon the VIN and VBIAS conditions, use Equation 1 to calculate the VIN to VOUT voltage drop:

Equation 1. eq1_delta_slvsci4.gif

where

  • ΔV = voltage drop from VIN to VOUT
  • ILOAD = load current
  • RON = On-resistance of the device for a specific VIN and VBIAS combination

An appropriate ILOAD must be chosen such that the IMAX specification of the device is not violated.

9.2.2.2 Inrush Current

To determine how much inrush current will be caused by the CL capacitor, use Equation 2:

Equation 2. Eq2_Iinrush_slvsci4.gif

where

  • IINRUSH = amount of inrush caused by CL
  • CL = capacitance on VOUT
  • dt = time it takes for change in VOUT during the ramp up of VOUT when the device is enabled
  • dVOUT = change in VOUT during the ramp up of VOUT when the device is enabled

An appropriate CL value should be placed on VOUT such that the IMAX and IPLS specficiations of the device are not violated.

SC001_SLVSCN2.pngFigure 33. Inrush Current (VBIAS = 5 V, VIN = 5 V, CL = 100 µF)

9.2.2.3 Thermal Considerations

The maximum IC junction temperature should be restricted to 125°C under normal operating conditions. To calculate the maximum allowable dissipation, PD(max) for a given output current and ambient temperature, use Equation 3.

Equation 3. eq_thrm_slvsci4.gif

where

  • PD(max) = maximum allowable power dissipation
  • TJ(max) = maximum allowable junction temperature (125°C for the TPS22962)
  • TA = ambient temperature of the device
  • θJA = junction to air thermal impedance. See Thermal Information section. This parameter is highly dependent upon board layout.

9.2.3 Application Curves

SW_016_SW_018_SLVSCN2.png
VBIAS = 5 V VIN = 5 V CIN = 1 µF
CL = 0.1 µF
Figure 34. tR at VBIAS = 5 V
SW_051_SW_053_SLVSCN2.png
VBIAS = 2.5 V VIN = 2.5 V CIN = 1 µF
CL = 0.1 µF
Figure 36. tR at VBIAS = 2.5 V
SW_017_SW_019_SLVSCN2.png
VBIAS = 5 V VIN = 5 V CIN = 1 µF
CL = 0.1 µF
Figure 38. tF at VBIAS = 5 V
SW_047_SW_049_SLVSCN2.png
VBIAS = 2.5 V VIN = 2.5 V CIN = 1 µF
CL = 0.1 µF
Figure 40. tF at VBIAS = 2.5 V
SW_076_SW_078_SLVSCN2.png
VBIAS = 5 V VIN = 1.05 V CIN = 1 µF
CL = 0.1 µF
Figure 35. tR at VBIAS = 5 V
SW_081_SW_083_SLVSCN2.png
VBIAS = 2.5 V VIN = 1.05 V CIN = 1 µF
CL = 0.1 µF
Figure 37. tR at VBIAS = 2.5 V
SW_052_SW_054_SLVSCN2.png
VBIAS = 5 V VIN = 2.5 V CIN = 1 µF
CL = 0.1 µF
Figure 39. tF at VBIAS = 5 V
SW_097_SW_099_SLVSCN2.png
VBIAS = 2.5 V VIN = 0.8 V CIN = 1 µF
CL = 0.1 µF
Figure 41. tF at VBIAS = 2.5 V