ZHCSTC5A October 2023 – March 2024 LM51772
ADVANCE INFORMATION
The LM51772 has four register to digital channels, where the CFG1 is allocated to the ADDR/SLOPE -pin. The channels CFG3 and CFG4 are ultiplexed with the SDA/SCL pins.
The resistor selection on the CFG pins is read and latched during the power-up sequence of the device. The selection cannot be changed until the voltage on the EN or UVLO reaches the falling threshold or VCC voltage drops below the VCCT-(UVLO) threshold. The Table 8-4 shows the possible device configurations versus the different resistor values on the CFG pins.
# | R(CFG) / kΩ | I2C/ADDR | Slope Compensation |
---|---|---|---|
1 | GND | I2C ENABLED Address 0x6A | Default NVM setting 0.875 |
2 | 0.511 | I2C DISABLED | 0.25 |
3 | 1.15 | 0.375 | |
4 | 1.9 | 0.5 | |
5 | 2.7 | 0.625 | |
6 | 3.8 | 0.75 | |
7 | 5.1 | 0.875 | |
8 | 6.5 | 1 | |
9 | 8.3 | 1.5 | |
10 | 10.5 | 2 | |
11 | 13.3 | 2.5 | |
12 | 16.2 | 3 | |
13 | 20.5 | 3.5 | |
14 | 24.9 | 4 | |
15 | 30.1 | 4.5 | |
16 | VCC2 | I2C ENABLED Address 0x6B | Default NVM setting 0.875 |
# | R(CFG) / kΩ | EN_SYNC_OUT | SYNC_IN_FALLING | VDET_EN | PCM_EN |
---|---|---|---|---|---|
1 | 0 | DISABLED | DISABLED | DISABLED | DISABLE |
2 | 0.511 | ENABLED | |||
3 | 1.15 | DISABLED | ENABLED | ||
4 | 1.9 | ENABLED | |||
5 | 2.7 | DISABLED | DISABLED | ENABLED | |
6 | 3.8 | ENABLED | |||
7 | 5.1 | DISABLED | ENABLED | ||
8 | 6.5 | ENABLED | |||
9 | 8.3 | DISABLED | DISABLED | DISABLED | ENABLED |
10 | 10.5 | ENABLED | |||
11 | 13.3 | DISABLED | ENABLED | ||
12 | 16.2 | ENABLED | |||
13 | 20.5 | DISABLED | DISABLED | ENABLED | |
14 | 24.9 | ENABLED | |||
15 | 30.1 | DISABLED | ENABLED | ||
16 | 36.5 | ENABLED |
# | R(CFG) / kΩ | EN_VCC1 | INC_INDUCT_De-Rate | μSLEEP | SCALE_DT |
---|---|---|---|---|---|
1 | 0 | DISABLED | DISABLED | DISABLED | DISABLE |
2 | 0.511 | ENABLED | |||
3 | 1.15 | DISABLED | ENABLED | ||
4 | 1.9 | ENABLED | |||
5 | 2.7 | DISABLED | DISABLED | ENABLED | |
6 | 3.8 | ENABLED | |||
7 | 5.1 | DISABLED | ENABLED | ||
8 | 6.5 | ENABLED | |||
9 | 8.3 | DISABLED | DISABLED | DISABLED | ENABLED |
10 | 10.5 | ENABLED | |||
11 | 13.3 | DISABLED | ENABLED | ||
12 | 16.2 | ENABLED | |||
13 | 20.5 | DISABLED | DISABLED | ENABLED | |
14 | 24.9 | ENABLED | |||
15 | 30.1 | DISABLED | ENABLED | ||
16 | 36.5 | ENABLED |
# | R(CFG) / kΩ | DRSS | SCP – Hiccup Mode | Negative Current Limit | Current Limit |
---|---|---|---|---|---|
1 | 0 | DISABLED | DISABLED | DISABLED | DISABLE |
2 | 0.511 | ENABLED | |||
3 | 1.15 | DISABLED | ENABLED | ||
4 | 1.9 | ENABLED | |||
5 | 2.7 | DISABLED | DISABLED | ENABLED | |
6 | 3.8 | ENABLED | |||
7 | 5.1 | DISABLED | ENABLED | ||
8 | 6.5 | ENABLED | |||
9 | 8.3 | DISABLED | DISABLED | DISABLED | ENABLED |
10 | 10.5 | ENABLED | |||
11 | 13.3 | DISABLED | ENABLED | ||
12 | 16.2 | ENABLED | |||
13 | 20.5 | DISABLED | DISABLED | ENABLED | |
14 | 24.9 | ENABLED | |||
15 | 30.1 | DISABLED | ENABLED | ||
16 | 36.5 | ENABLED |