ZHCSSO2 July 2023 IWRL1432
ADVANCE INFORMATION
Table 8-3 describes the power rails from an external power supply block to the device via a BOM Optimized 3.3V I/O Topology.
SUPPLY | DEVICE BLOCKS POWERED FROM THE SUPPLY | RELEVANT IOs IN THE DEVICE |
---|---|---|
3.3V | Digital I/Os | Input: VIOIN |
1.8V | Synthesizer and APLL VCOs, crystal oscillator, IF Amplifier stages, ADC | Input: VDDA_18VCO, VIOIN_18CLK, VDDA_18BB,
VIOIN_18, VIN_18PM LDO Output: VOUT_14SYNTH, VDDA_10RF, VDD_SRAM, VOUT_14APLL, VDDA_12RF, VDD |