10.1.1 General PowerPAD Design Considerations

The device is available in a thermally-enhanced PowerPAD package. This package is constructed using a downset leadframe upon which the die is mounted; see Figure 25(a) and Figure 25(b). This arrangement results in the lead frame being exposed as a thermal pad on the underside of the package; see Figure 25(c). This thermal pad has direct thermal contact with the die; thus, excellent thermal performance is achieved by providing a good thermal path away from the thermal pad.

Figure 25. Views of a Thermally-Enhanced PWP Package

The PowerPAD package allows for both assembly and thermal management in one manufacturing operation. During the surface-mount solder operation (when the leads are being soldered), the thermal pad must be soldered to a copper area underneath the package. Through the use of thermal paths within this copper area, heat can be conducted away from the package into either a ground plane or other heat-dissipating device. Soldering the PowerPAD to the printed circuit board (PCB) is always required, even with applications that have low power dissipation. This technique provides the necessary thermal and mechanical connection between the lead frame die pad and the PCB.

The PowerPAD must be connected to the most negative supply voltage on the device, GNDA and GNDD.

1. Prepare the PCB with a top-side etch pattern. There should be etching for the leads as well as etch for the thermal pad.
2. Place recommended holes in the area of the thermal pad. Ideal thermal land size and thermal via patterns for the HTSSOP-28 PWP package can be seen in the technical brief, PowerPAD Thermally-Enhanced Package (SLMA002), available for download at www.ti.com. These holes should be 13 mils (0.33 mm) in diameter. Keep these holes small, so that solder wicking through the holes is not a problem during reflow. An example thermal land pattern mechanical drawing is attached to the end of this data sheet.
3. Additional vias may be placed anywhere along the thermal plane outside of the thermal pad area to help dissipate the heat generated by the device. These additional vias may be larger than the 13-mil diameter vias directly under the thermal pad. These vias can be larger because they are not in the thermal pad area to be soldered; thus, wicking is not a problem.
4. Connect all holes to the internal plane that is at the same voltage potential as the GND pins.
5. When connecting these holes to the internal plane, do not use the typical web or spoke via connection methodology. Web connections have a high thermal resistance connection that is useful for slowing the heat transfer during soldering operations. This configuration makes the soldering of vias that have plane connections easier. In this application, however, low thermal resistance is desired for the most efficient heat transfer. Therefore, the holes under the device PowerPAD package should make their connection to the internal plane with a complete connection around the entire circumference of the plated-through hole.
6. The top-side solder mask should leave the pins of the package and the thermal pad area with its twelve holes exposed. The bottom-side solder mask should cover the holes of the thermal pad area. This masking prevents solder from being pulled away from the thermal pad area during the reflow process.
7. Apply solder paste to the exposed thermal pad area and all device pins.
8. With these preparatory steps in place, simply place the device in position and run the chip through the solder reflow operation as any standard surface-mount component. This preparation results in a properly installed part.

For a given R_θJA (listed in the Electrical Characteristics), the maximum power dissipation is shown in Figure 26 and calculated by Equation 2:

Equation 2.

where

• P_D = maximum power dissipation (W),
• T_MAX = absolute maximum junction temperature (125°C), and
• T_A = free-ambient air temperature (°C).

Figure 26. Maximum Power Dissipation
vs Free-Air Temperature
(With PowerPAD Soldered Down)