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线性和低压降 (LDO) 稳压器

TPS74401-EP

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具有 0.8V 至 3.6V 输出、快速瞬态响应和可编程软启动的 3A LDO 稳压器（增强型产品）

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数据表

TPS74401-EP

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产品详情

Rating HiRel Enhanced Product Vin (max) (V) 5.5 Vin (min) (V) 0.8 Iout (max) (A) 3 Output options Adjustable Output Vout (max) (V) 3.6 Vout (min) (V) 0.8 Noise (µVrms) 13 PSRR at 100 KHz (dB) 50 Iq (typ) (mA) 3 Features Enable, Power good, Soft start Thermal resistance θJA (°C/W) 27 Load capacitance (min) (µF) 0 Regulated outputs (#) 1 Accuracy (%) 1 Dropout voltage (Vdo) (typ) (mV) 115 Operating temperature range (°C) -55 to 125
Rating HiRel Enhanced Product Vin (max) (V) 5.5 Vin (min) (V) 0.8 Iout (max) (A) 3 Output options Adjustable Output Vout (max) (V) 3.6 Vout (min) (V) 0.8 Noise (µVrms) 13 PSRR at 100 KHz (dB) 50 Iq (typ) (mA) 3 Features Enable, Power good, Soft start Thermal resistance θJA (°C/W) 27 Load capacitance (min) (µF) 0 Regulated outputs (#) 1 Accuracy (%) 1 Dropout voltage (Vdo) (typ) (mV) 115 Operating temperature range (°C) -55 to 125
VQFN (RGW) 20 25 mm² (5 mm × 5 mm)
  • Soft-Start (SS) Pin Provides a Linear Startup with Ramp Time Set by External Capacitor
  • 1% Accuracy Over Line, Load, and Temperature
  • Supports Input Voltages as Low as 0.9 V with External Bias Supply
  • Adjustable Output (0.8 V to 3.6 V)
  • Ultra-Low Dropout: 115 mV at 3.0 A (typ)
  • Stable with Any or No Output Capacitor
  • Excellent Transient Response
  • Available in 5 mm × 5 mm × 1 mm QFN Package
  • Active High Enable
  • SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Military (–55°C/125°C) Temperature Ranges(1)
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability
  • APPLICATIONS
    • FPGA Applications
    • DSP Core and I/O Voltages
    • Post-Regulation Applications
    • Applications with Special Start-Up Time or Sequencing Requirements
    • Hot-Swap and Inrush Controls

(1) Custom temperature ranges available
All other trademarks are the property of their respective owners
  • Soft-Start (SS) Pin Provides a Linear Startup with Ramp Time Set by External Capacitor
  • 1% Accuracy Over Line, Load, and Temperature
  • Supports Input Voltages as Low as 0.9 V with External Bias Supply
  • Adjustable Output (0.8 V to 3.6 V)
  • Ultra-Low Dropout: 115 mV at 3.0 A (typ)
  • Stable with Any or No Output Capacitor
  • Excellent Transient Response
  • Available in 5 mm × 5 mm × 1 mm QFN Package
  • Active High Enable
  • SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Military (–55°C/125°C) Temperature Ranges(1)
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability
  • APPLICATIONS
    • FPGA Applications
    • DSP Core and I/O Voltages
    • Post-Regulation Applications
    • Applications with Special Start-Up Time or Sequencing Requirements
    • Hot-Swap and Inrush Controls

(1) Custom temperature ranges available
All other trademarks are the property of their respective owners

The TPS74401 low-dropout (LDO) linear regulator provides an easy-to-use robust power management solution for a wide variety of applications. User-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current on start-up. The soft-start is monotonic and well-suited for powering many different types of processors and ASICs. The enable input and power-good output allow easy sequencing with external regulators. This complete flexibility permits the user to configure a solution that will meet the sequencing requirements of FPGAs, DSPs, and other applications with specific start-up requirements.

A precision reference and error amplifier deliver 1% accuracy over load, line, temperature, and process. Each LDO is stable with low-cost ceramic output capacitors and the device is fully specified from –55°C to 125°C.

The TPS74401 low-dropout (LDO) linear regulator provides an easy-to-use robust power management solution for a wide variety of applications. User-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current on start-up. The soft-start is monotonic and well-suited for powering many different types of processors and ASICs. The enable input and power-good output allow easy sequencing with external regulators. This complete flexibility permits the user to configure a solution that will meet the sequencing requirements of FPGAs, DSPs, and other applications with specific start-up requirements.

A precision reference and error amplifier deliver 1% accuracy over load, line, temperature, and process. Each LDO is stable with low-cost ceramic output capacitors and the device is fully specified from –55°C to 125°C.

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技术文档

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 3.0A Ultra-LDO With Programmable Soft-Start. 数据表 (Rev. B) 2010-9-8
* 辐射与可靠性报告 TPS74401MRGWTEP Reliability Report 2011-10-26
* VID TPS74401-EP VID V6210611 2016-6-21

设计与开发

如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。

参考设计

TIDA-01442 — 使用 ADC12DJ3200 的 L、S、C 和 X 带的直接射频采样雷达接收器参考设计

此参考设计利用 ADC12DJ3200 评估模块 (EVM) 演示直接射频采样接收器，适用于在 HF、VHF、UHF、L、S、C 和部分 X 带上运行的雷达。模数转换器 (ADC) 的宽模拟输入带宽和高采样率 (6.4GSPS) 可为单通道或双通道 ADC 提供多频带覆盖。该 ADC 具有直接射频采样功能，取消了对多个降压转换级的需求，减少了组件数量，因此降低了系统整体的复杂性。

支持的产品和硬件
封装 引脚 CAD 符号、封装和 3D 模型
VQFN (RGW) 20 Ultra Librarian
适用于评估类项目的 TI 标准条款与条件。

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