TPS720

正在供货

具有使能功能的 350mA、低输入电压 (1.1V)、高 PSRR、低 IQ、低压降稳压器

产品详情

Rating Catalog Vin (max) (V) 4.5 Vin (min) (V) 1.1 Iout (max) (A) 0.35 Output options Fixed Output Vout (max) (V) 1.8 Vout (min) (V) 0.9 Fixed output options (V) 0.9, 1, 1.02, 1.05, 1.1, 1.15, 1.2, 1.3, 1.32, 1.5, 1.7, 1.8, 2.3 Noise (µVrms) 48 PSRR at 100 KHz (dB) 55 Iq (typ) (mA) 0.038 Features Enable Thermal resistance θJA (°C/W) 67 Load capacitance (min) (µF) 2.2 Regulated outputs (#) 1 Accuracy (%) 2 Dropout voltage (Vdo) (typ) (mV) 110 Operating temperature range (°C) -40 to 125
Rating Catalog Vin (max) (V) 4.5 Vin (min) (V) 1.1 Iout (max) (A) 0.35 Output options Fixed Output Vout (max) (V) 1.8 Vout (min) (V) 0.9 Fixed output options (V) 0.9, 1, 1.02, 1.05, 1.1, 1.15, 1.2, 1.3, 1.32, 1.5, 1.7, 1.8, 2.3 Noise (µVrms) 48 PSRR at 100 KHz (dB) 55 Iq (typ) (mA) 0.038 Features Enable Thermal resistance θJA (°C/W) 67 Load capacitance (min) (µF) 2.2 Regulated outputs (#) 1 Accuracy (%) 2 Dropout voltage (Vdo) (typ) (mV) 110 Operating temperature range (°C) -40 to 125
WSON (DRV) 6 4 mm² (2 mm × 2 mm) DSBGA (YZU) 5 2.02 mm² (— mm × — mm)
  • 350-mA High-Performance LDO
  • Low Quiescent Current: 38 µA
  • Excellent Load Transient Response:
    ±15 mV for ILOAD = 0 mA to 350 mA in 1 µs
  • Excellent Line Transient Response:
    ΔVOUT = ±2 mV for ΔVBIAS = ±600 mV in 1 µs
    ΔVOUT = ±200 µV for ΔVIN = ±400 mV in 1 µs
  • Low Noise: 48 µVRMS (10 Hz to 100 kHz)
  • 80 dB VIN PSRR (10 Hz to 10 kHz)
  • 70 dB VBIAS PSRR (10 Hz to 10 kHz)
  • Fast Start-Up Time: 140 µs
  • Built-In Soft-Start With Monotonic VOUT Rise and Start-Up Current Limited to 100 mA + ILOAD
  • Overcurrent and Thermal Protection
  • Low Dropout: 110 mV at ILOAD = 350 mA
  • Stable with 2.2-µF Output Capacitor
  • Available in 1.33 mm × 0.96 mm DSBGA-5 and 2 mm × 2 mm SON-6 Packages
  • 350-mA High-Performance LDO
  • Low Quiescent Current: 38 µA
  • Excellent Load Transient Response:
    ±15 mV for ILOAD = 0 mA to 350 mA in 1 µs
  • Excellent Line Transient Response:
    ΔVOUT = ±2 mV for ΔVBIAS = ±600 mV in 1 µs
    ΔVOUT = ±200 µV for ΔVIN = ±400 mV in 1 µs
  • Low Noise: 48 µVRMS (10 Hz to 100 kHz)
  • 80 dB VIN PSRR (10 Hz to 10 kHz)
  • 70 dB VBIAS PSRR (10 Hz to 10 kHz)
  • Fast Start-Up Time: 140 µs
  • Built-In Soft-Start With Monotonic VOUT Rise and Start-Up Current Limited to 100 mA + ILOAD
  • Overcurrent and Thermal Protection
  • Low Dropout: 110 mV at ILOAD = 350 mA
  • Stable with 2.2-µF Output Capacitor
  • Available in 1.33 mm × 0.96 mm DSBGA-5 and 2 mm × 2 mm SON-6 Packages

The TPS720 family of dual rail, low-dropout linear regulators (LDOs) offers outstanding ac performance (PSRR, load and line transient response), while consuming a very low quiescent current of 38 µA.

The VBIAS rail that powers the control circuit of the LDO draws very low current (on the order of the quiescent current of the LDO) and can be connected to any power supply that is equal to or greater than 1.4 V above the output voltage. The main power path is through VIN, which can be a lower voltage than VBIAS; it can be as low as VOUT + VDO, increasing the efficiency of the solution in many power-sensitive applications. For example, VIN can be an output of a high-efficiency, DC-DC step-down regulator.

The TPS720 supports a novel feature in which the output of the LDO regulates under light loads when the IN pin is left floating. The light-load drive current is sourced from VBIAS under this condition. This feature is particularly useful in power-saving applications where the DC-DC converter connected to the IN pin is disabled but the LDO is still required to regulate the voltage to a light load.

The TPS720 is stable with ceramic capacitors and uses an advanced BICMOS fabrication process that yields a dropout of 110 mV at a 350-mA output load. The TPS720 has the unique feature of providing a monotonic VOUT rise (overshoot limited to 3%) with VIN inrush current limited to 100 mA + ILOAD with an output capacitor of 2.2 µF.

The TPS720 uses a precision voltage reference and feedback loop to achieve overall accuracy of 2% over load, line, process, and temperature extremes. An ultra-small DSBGA package makes the TPS720 ideal for handheld applications. The TPS720 is also available in a SON-8 package. This family of devices is fully specified over the temperature range of
TJ = –40°C to 125°C.

The TPS720 family of dual rail, low-dropout linear regulators (LDOs) offers outstanding ac performance (PSRR, load and line transient response), while consuming a very low quiescent current of 38 µA.

The VBIAS rail that powers the control circuit of the LDO draws very low current (on the order of the quiescent current of the LDO) and can be connected to any power supply that is equal to or greater than 1.4 V above the output voltage. The main power path is through VIN, which can be a lower voltage than VBIAS; it can be as low as VOUT + VDO, increasing the efficiency of the solution in many power-sensitive applications. For example, VIN can be an output of a high-efficiency, DC-DC step-down regulator.

The TPS720 supports a novel feature in which the output of the LDO regulates under light loads when the IN pin is left floating. The light-load drive current is sourced from VBIAS under this condition. This feature is particularly useful in power-saving applications where the DC-DC converter connected to the IN pin is disabled but the LDO is still required to regulate the voltage to a light load.

The TPS720 is stable with ceramic capacitors and uses an advanced BICMOS fabrication process that yields a dropout of 110 mV at a 350-mA output load. The TPS720 has the unique feature of providing a monotonic VOUT rise (overshoot limited to 3%) with VIN inrush current limited to 100 mA + ILOAD with an output capacitor of 2.2 µF.

The TPS720 uses a precision voltage reference and feedback loop to achieve overall accuracy of 2% over load, line, process, and temperature extremes. An ultra-small DSBGA package makes the TPS720 ideal for handheld applications. The TPS720 is also available in a SON-8 package. This family of devices is fully specified over the temperature range of
TJ = –40°C to 125°C.

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技术文档

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 TPS720 350 mA, Ultra-Low VIN, RF Low-Dropout Linear Regulator With Bias Pin 数据表 (Rev. E) PDF | HTML 2015-9-30
应用手册 LDO 噪声揭秘 (Rev. B) PDF | HTML 英语版 (Rev.B) PDF | HTML 2020-9-16
应用手册 A Topical Index of TI LDO Application Notes (Rev. F) 2019-6-27
选择指南 Low Dropout Regulators Quick Reference Guide (Rev. P) 2018-3-21
应用手册 LDO PSRR Measurement Simplified (Rev. A) PDF | HTML 2017-8-9
应用手册 Power Reference Design for the 'C6472, 12V DCDC Controllers, and LDOs 2010-3-26
模拟设计期刊 Taming linear-regulator inrush currents 2009-5-1
模拟设计期刊 Q2 2009 Issue Analog Applications Journal 2009-5-1
用户指南 TPS720xx 2008-8-19
应用手册 Inrush Current Limit in the TPS720xx 2008-6-6

设计与开发

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评估板

TPS720105DRVEVM — Evaluation Module for TPS720105 Low-Dropout Linear Regulator in DRV (SON-6) Package

TPS720105DRVEVM 是一块完全组装且经过测试的电路板,用于对采用 DRV (2mm x 2mm SON-6) 封装的 TPS720105 低压降线性稳压器进行评估。
用户指南: PDF
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SLVMCO0.ZIP (135 KB) - PSpice 模型
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SBVM562.ZIP (110 KB) - PSpice 模型
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TPS72033 PSpice Transient Model

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参考设计

TIDA-00204 — 符合 EMI/EMC 标准的工业温度双端口千兆位以太网 PHY 参考设计

此设计用于对两个工业级 DP83867IR 千兆位以太网 PHY 和 Sitara™ 主机处理器(含集成式以太网 MAC 和交换机)进行性能评估。此设计旨在满足 EMI 和 EMC 的工业要求。此设计的应用固件实现了适用于 PHY、UDP 和 TCP/IP 协议栈以及 HTTP Web 服务器示例的驱动程序。主机处理器配置为从板载 SD 卡引导预安装的固件。通过 USB 虚拟 COM 端口可访问 PHY 寄存器。通过 JTAG 接口可自行进行固件开发。

支持的产品和硬件
封装 引脚 CAD 符号、封装和 3D 模型
WSON (DRV) 6 Ultra Librarian
DSBGA (YZU) 5 Ultra Librarian

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