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Technology family LVC Number of channels 3 IOL (max) (mA) 32 Supply current (max) (µA) 10 IOH (max) (mA) -32 Input type Standard CMOS Output type Push-Pull Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LVC Number of channels 3 IOL (max) (mA) 32 Supply current (max) (µA) 10 IOH (max) (mA) -32 Input type Standard CMOS Output type Push-Pull Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
VSSOP (DCU) 8 6.2 mm² (2 mm × 3.1 mm) SSOP (DCT) 8 11.8 mm² (2.95 mm × 4 mm) DSBGA (YZP) 8 2.8125 mm² (— mm × — mm)
  • Available in the Texas Instruments
    NanoFree Package
  • Supports 5.5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.1 ns at 3.3 V
  • Low Power Consumption, 10-µA Maximum ICC
  • ±24-mA Output Drive at 3.3 V
  • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
  • Can Be Used as a Down Translator to Translate Inputs From a Maximum of 5.5 V Down to the VCC Level
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

All trademarks are the property of their respective owners.

  • Available in the Texas Instruments
    NanoFree Package
  • Supports 5.5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.1 ns at 3.3 V
  • Low Power Consumption, 10-µA Maximum ICC
  • ±24-mA Output Drive at 3.3 V
  • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
  • Can Be Used as a Down Translator to Translate Inputs From a Maximum of 5.5 V Down to the VCC Level
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

All trademarks are the property of their respective owners.

The SN74LVC3G34 device is a triple buffer gate designed for 1.65-V to 5.5-V VCC operation. The SN74LVC3G34 device performs the Boolean function Y = A in positive logic.

NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The SN74LVC3G34 device is a triple buffer gate designed for 1.65-V to 5.5-V VCC operation. The SN74LVC3G34 device performs the Boolean function Y = A in positive logic.

NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

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* 数据表 SN74LVC3G34 Triple Buffer Gate 数据表 (Rev. L) PDF | HTML 2015-10-30

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SN74LVC3G34 Behavioral SPICE Model

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SN74LVC3G34 IBIS Model (Rev. A)

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