SN74AUP3G07
- Available in the Texas Instruments NanoStar Package
- Low Static-Power Consumption
(ICC = 0.9 µA Maximum) - Low Dynamic-Power Consumption
(Cpd = 4.3 pF Typ at 3.3 V) - Low Input Capacitance (Ci = 1.5 pF Typical)
- Low Noise – Overshoot and Undershoot
<10% of VCC - Ioff Supports Partial-Power-Down Mode Operation
- Wide Operating VCC Range of 0.8 V to 3.6 V
- Optimized for 3.3-V Operation
- 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
- tpd = 4.3 ns Maximum at 3.3 V
- Suitable for Point-to-Point Applications
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model
(A114-B, Class II) - 1000-V Charged-Device Model (C101)
- 2000-V Human-Body Model
The AUP family is TIs premier solution to the industry's low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in increased battery life (see ). This product also maintains excellent signal integrity.
The output of SN74AUP3G07 is open drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions.
NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
技术文档
类型 | 标题 | 下载最新的英语版本 | 日期 | |||
---|---|---|---|---|---|---|
* | 数据表 | SN74AUP3G07 Low-Power Triple Buffer/Driver With Open-Drain Outputs 数据表 (Rev. C) | 2010年 12月 13日 | |||
应用简报 | 了解施密特触发器 (Rev. A) | PDF | HTML | 英语版 (Rev.A) | PDF | HTML | 2022年 12月 1日 | |
选择指南 | Little Logic Guide 2018 (Rev. G) | 2018年 7月 6日 | ||||
选择指南 | Logic Guide (Rev. AB) | 2017年 6月 12日 | ||||
应用手册 | How to Select Little Logic (Rev. A) | 2016年 7月 26日 | ||||
选择指南 | 逻辑器件指南 2014 (Rev. AA) | 最新英语版本 (Rev.AB) | 2014年 11月 17日 | |||
选择指南 | 小尺寸逻辑器件指南 (Rev. E) | 最新英语版本 (Rev.G) | 2012年 7月 16日 | |||
应用手册 | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004年 7月 8日 |
设计和开发
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5-8-LOGIC-EVM — 支持 5 至 8 引脚 DCK、DCT、DCU、DRL 和 DBV 封装的通用逻辑评估模块
封装 | 引脚 | CAD 符号、封装和 3D 模型 |
---|---|---|
DSBGA (YFP) | 8 | Ultra Librarian |
UQFN (RSE) | 8 | Ultra Librarian |
VSSOP (DCU) | 8 | Ultra Librarian |
X2SON (DQE) | 8 | Ultra Librarian |
订购和质量
- RoHS
- REACH
- 器件标识
- 引脚镀层/焊球材料
- MSL 等级/回流焊峰值温度
- MTBF/时基故障估算
- 材料成分
- 鉴定摘要
- 持续可靠性监测
- 制造厂地点
- 封装厂地点