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Technology family LVC Number of channels 1 Inputs per channel 3 IOL (max) (mA) 32 IOH (max) (mA) -32 Output type Push-Pull Input type Standard CMOS Features Over-voltage tolerant Inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Data rate (max) (Mbps) 100 Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LVC Number of channels 1 Inputs per channel 3 IOL (max) (mA) 32 IOH (max) (mA) -32 Output type Push-Pull Input type Standard CMOS Features Over-voltage tolerant Inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Data rate (max) (Mbps) 100 Rating Catalog Operating temperature range (°C) -40 to 125
SOT-23 (DBV) 6 8.12 mm² (2.9 mm × 2.8 mm) X2SON (DSF) 6 1 mm² (1 mm × 1 mm) SOT-SC70 (DCK) 6 4.2 mm² (2 mm × 2.1 mm) USON (DRY) 6 1.45 mm² (1.45 mm × 1 mm) DSBGA (YZP) 6 2.1875 mm² (— mm × — mm)
  • Available in the Texas Instruments NanoFree Package
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Supports Down Translation to VCC
  • Max tpd of 4.5 ns at 3.3 V
  • Low Power Consumption, 10-µA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
  • Latch-Up Performance Exceeds 100 mA Per
    JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

  • Available in the Texas Instruments NanoFree Package
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Supports Down Translation to VCC
  • Max tpd of 4.5 ns at 3.3 V
  • Low Power Consumption, 10-µA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
  • Latch-Up Performance Exceeds 100 mA Per
    JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

The SN74LVC1G27 device performs the Boolean function Y = A + B + C or Y = A  •  B  •  C in positive logic.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The SN74LVC1G27 device performs the Boolean function Y = A + B + C or Y = A  •  B  •  C in positive logic.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

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* 数据表 Single 3-Input Positive-NOR Gate 数据表 (Rev. E) 2013-12-23

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通用 EVM 旨在支持采用 DTT、DRY、DPW、DTM、DQE、DQM、DSF 或 DTQ 封装的任何逻辑或转换器件。电路板设计可实现灵活的评估。

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SN74LVC1G27 Behavioral SPICE Model

SCEM634.ZIP (8 KB) - PSpice 模型
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仿真模型

SN74LVC1G27 IBIS Model (Rev. A)

SCEM370 (242 KB) - IBIS 模型
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参考设计

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此设计为通过热风和空调 (HVAC) 系统监控气流效率和温度提供了参考。该参考设计与固态继电器和压电振动传感器配合使用,从而通过空气处理器监控低气流和低温状况并做出相应的反应。该系统还包含校准算法,以确保所有系统设置的性能均保持一致。

支持的产品和硬件
封装 引脚 CAD 符号、封装和 3D 模型
SOT-23 (DBV) 6 Ultra Librarian
X2SON (DSF) 6 Ultra Librarian
SOT-SC70 (DCK) 6 Ultra Librarian
USON (DRY) 6 Ultra Librarian
DSBGA (YZP) 6 Ultra Librarian

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