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SN74LS132

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具有施密特触发输入的 4 通道、2 输入、4.75V 至 5.25V 双极与非门

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SN74LS132

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产品详情

Technology family LS Number of channels 4 Inputs per channel 2 IOL (max) (mA) 16 IOH (max) (mA) -0.8 Input type Schmitt-Trigger Output type Push-Pull Features High speed (tpd 10-50ns) Data rate (max) (Mbps) 35 Rating Catalog Operating temperature range (°C) 0 to 70
Technology family LS Number of channels 4 Inputs per channel 2 IOL (max) (mA) 16 IOH (max) (mA) -0.8 Input type Schmitt-Trigger Output type Push-Pull Features High speed (tpd 10-50ns) Data rate (max) (Mbps) 35 Rating Catalog Operating temperature range (°C) 0 to 70
SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm) PDIP (N) 14 181.42 mm² (19.3 mm × 9.4 mm) SOP (NS) 14 79.56 mm² (10.2 mm × 7.8 mm)
  • Operation from Very Slow Edges
  • Improved Line-Receiving Characteristics
  • High Noise Immunity

 
  • Operation from Very Slow Edges
  • Improved Line-Receiving Characteristics
  • High Noise Immunity

 

Each circuit functions as a 2-input NAND gate, but because of the Schmitt action, it has different input threshold levels for positive (VT+) and for negative going (VT-) signals.

These circuits are temperature-compensated and can be triggered from the slowest of input ramps and still give clear, jitter-free output signals.

The SN54132, SN54LS132, and SN54S132 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74132, SN74LS132, and SN74S132 are characterized for operation from 0°C to 70°C.

 

Each circuit functions as a 2-input NAND gate, but because of the Schmitt action, it has different input threshold levels for positive (VT+) and for negative going (VT-) signals.

These circuits are temperature-compensated and can be triggered from the slowest of input ramps and still give clear, jitter-free output signals.

The SN54132, SN54LS132, and SN54S132 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74132, SN74LS132, and SN74S132 are characterized for operation from 0°C to 70°C.

 
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* 数据表 Quadruple 2-Input Positive-NAND Schmitt Triggers 数据表 1988-3-1

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