SN74HC594
- Wide Operating Voltage Range of 2 V to 6 V
- High-Current Outputs Can Drive up to
15 LSTTL Loads - Low Power Consumption, 80-µA Maximum ICC
- Typical tpd = 15 ns
- ±6-mA Output Drive at 5 V
- Low Input Current of 1 µA Maximum
- 8-Bit Serial-In, Parallel-Out Shift Registers With
Storage - Independent Direct Overriding Clears on Shift and
Storage Registers - Independent Clocks for Both Shift and
Storage Registers
The SNx4HC594 devices contain an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Separate clocks and direct overriding clear (RCLR, SRCLR) inputs are provided on both the shift and storage registers. A serial (QH’) output is provided for cascading purposes.
Both the shift register (SRCLK) and storage register (RCLK) clocks are positive edge triggered. If both clocks are connected together, the shift register always is one count pulse ahead of the storage register.
The parallel (QA – QH) outputs have high-current capability. QH’ is a standard output.
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| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | SNx4HC594 8-Bit Shift Registers With Output Registers 数据表 (Rev. G) | PDF | HTML | 2015-3-30 | ||
| 应用简报 | TI 逻辑系列的内插规格值 | PDF | HTML | PDF | HTML | 2026-4-17 | ||
| 应用手册 | Power-Up Behavior of Clocked Devices (Rev. B) | PDF | HTML | 2022-12-15 |
设计与开发
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评估板
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| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| SOIC (DW) | 16 | Ultra Librarian |
| PDIP (N) | 16 | Ultra Librarian |
| SOIC (D) | 16 | Ultra Librarian |