SN65MLVD3
- Low-Voltage Differential 30-
Line Receivers for Signaling Rates(1) up to 250Mbps; Clock Frequencies up to 125MHz - SN65MLVD2 Type-1 Receiver Incorporates 25 mV of Input Threshold Hysteresis
- SN65MLVD3 Type-2 Receiver Provides 100 mV Offset Threshold to Detect Open-Circuit and Idle-Bus Conditions
- Wide Receiver Input Common-Mode Voltage Range, -1 V to 3.4 V, Allows 2 V of Ground Noise
- Improved VIT (35 mV)
- Meets or Exceeds the M-LVDS Standard TIA/EIA-899 for Multipoint Topology
- High Input Impedance with Low Supply Voltage
- Bus-Pin HBM ESD Protection Exceeds 9 kV
- Packaged in 8-Pin SON (DRB) 70% Smaller Than 8-Pin SOIC
- APPLICATIONS
- Parallel Multipoint Data and Clock Transmission via Backplanes and Cables
- Cellular Base Stations
- Central Office Switches
- Network Switches and Routers
(1) The signaling rate of a line is the number of voltage transitions that are made per second, expressed in the units bps (bits per second).
The SN65MLVD2 and SN65MLVD3 are single-channel M-LVDS receivers. These devices are designed in full compliance with the TIA/EIA-899 (M-LVDS) standard, which are optimized to operate at signaling rates up to 250 Mbps. Each receiver channel is controlled by a receive enable (RE). When RE = low, the corresponding channel is enabled; when RE = high, the corresponding channel is disabled.
The M-LVDS standard defines two types of receivers, designated as Type-1 and Type-2. Type-1 receivers (SN65MLVD2) have thresholds centered about zero with 25 mV of hysteresis to prevent output oscillations with loss of input; Type-2 receivers (SN65MLVD3) implement a failsafe by using an offset threshold. Receiver outputs are slew rate controlled to reduce EMI and crosstalk effects associated with large current surges.
The devices are characterized for operation from -40°C to 85°C.
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技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | Single M-LVDS Receivers 数据表 | 2006-11-2 | |||
| 应用手册 | AN-1926：M-LVDS 简介及其时钟和数据分配应用 (Rev. C) | PDF | HTML | 英语版 (Rev.C) | PDF | HTML | 2023-7-5 | |
| 应用简报 | How Far, How Fast Can You Operate MLVDS? | 2018-8-6 | ||||
| 应用手册 | SPI-Based Data Acquisition/Monitor Using the TLC2551 Serial ADC (Rev. A) | 2001-11-20 |
设计与开发
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SN65MLVD2-3EVM — SN65MLVD2-3EVM 评估模块
The SN65MLVD2 and SN65MLVD3 are single-channel M-LVDS receivers. These devices are designed in full compliance with the TIA/EIA-899 (M-LVDS) standard, which are optimized to operate at signaling rates up to250 Mbps. Each receiver channel is controlled by a receive enable (/RE). When /RE = low, (...)
| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| VSON (DRB) | 8 | Ultra Librarian |
订购和质量
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