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SN5400

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军用 4 通道双输入 4.5V 至 5.5V 双极与非门

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数据表

SN5400

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数据表 立即订购

产品详情

Technology family TTL Number of channels 4 Inputs per channel 2 IOL (max) (mA) 0.4 IOH (max) (mA) -16 Input type Bipolar Output type Push-Pull Features High speed (tpd 10-50ns) Data rate (max) (Mbps) 70 Rating Military Operating temperature range (°C) -55 to 125
Technology family TTL Number of channels 4 Inputs per channel 2 IOL (max) (mA) 0.4 IOH (max) (mA) -16 Input type Bipolar Output type Push-Pull Features High speed (tpd 10-50ns) Data rate (max) (Mbps) 70 Rating Military Operating temperature range (°C) -55 to 125
CDIP (J) 14 130.4652 mm² (— mm × — mm) CFP (W) 14 58.023 mm² (— mm × — mm)
  • Package Options Include:
    • Plastic Small-Outline (D, NS, PS)
    • Shrink Small-Outline (DB)
    • Ceramic Flat (W)
    • Ceramic Chip Carriers (FK)
    • Standard Plastic (N)
    • Ceramic (J)
  • Also Available as Dual 2-Input Positive-NAND Gate in Small-Outline (PS) Package
  • Inputs Are TTL Compliant; VIH = 2 V and
    VIL = 0.8 V
  • Inputs Can Accept 3.3-V or 2.5-V Logic Inputs
  • SN5400, SN54LS00, and SN54S00 are Characterized For Operation Over the Full Military Temperature Range of –55ºC to 125ºC
  • Package Options Include:
    • Plastic Small-Outline (D, NS, PS)
    • Shrink Small-Outline (DB)
    • Ceramic Flat (W)
    • Ceramic Chip Carriers (FK)
    • Standard Plastic (N)
    • Ceramic (J)
  • Also Available as Dual 2-Input Positive-NAND Gate in Small-Outline (PS) Package
  • Inputs Are TTL Compliant; VIH = 2 V and
    VIL = 0.8 V
  • Inputs Can Accept 3.3-V or 2.5-V Logic Inputs
  • SN5400, SN54LS00, and SN54S00 are Characterized For Operation Over the Full Military Temperature Range of –55ºC to 125ºC

The SNx4xx00 devices contain four independent,
2-input NAND gates. The devices perform the Boolean function Y = A .B or Y = A + B in positive logic.

The SNx4xx00 devices contain four independent,
2-input NAND gates. The devices perform the Boolean function Y = A .B or Y = A + B in positive logic.
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* 数据表 SNx400, SNx4LS00, and SNx4S00 Quadruple 2-Input Positive-NAND Gates 数据表 (Rev. D) PDF | HTML 2017-5-19

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