LP2996-N

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具有 DDR2 关断引脚的 1.5A DDR 终端稳压器

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数据表

document-pdfAcrobat LP2996/LP2996A DDR Termination Regulator 数据表 (Rev. K) (英语) PDF | HTML

LP2996-N

正在供货

立即订购

产品详情

Product type

DDR

Vin (min) (V)

1.8

Vin (max) (V)

5.5

Vout (min) (V)

0.656

Vout (max) (V)

0.698

Features

Shutdown Pin for S3

Rating

Catalog

Operating temperature range (°C)

0 to 125

Iq (typ) (mA)

0.32

DDR memory type

DDR, DDR2

Product type

DDR

Vin (min) (V)

1.8

Vin (max) (V)

5.5

Vout (min) (V)

0.656

Vout (max) (V)

0.698

Features

Shutdown Pin for S3

Rating

Catalog

Operating temperature range (°C)

0 to 125

Iq (typ) (mA)

0.32

DDR memory type

DDR, DDR2

SOIC (D)

8

29.4 mm² (4.9 mm × 6 mm)

WQFN (NHP)

16

16 mm² (4 mm × 4 mm)

HSOIC (DDA)

8

29.4 mm² (4.9 mm × 6 mm)

Minimum V_DDQ:
- 1.8 V (LP2996-N)
- 1.35 V (LP2996A)
Source and Sink Current
Low Output Voltage Offset
No External Resistors Required for Setting Output Voltage
Linear Topology
Suspend to Ram (STR) Functionality
Stable With Ceramic Capacitors With Appropriate ESR
Low External Component Count
Thermal Shutdown

Minimum V_DDQ:
- 1.8 V (LP2996-N)
- 1.35 V (LP2996A)
Source and Sink Current
Low Output Voltage Offset
No External Resistors Required for Setting Output Voltage
Linear Topology
Suspend to Ram (STR) Functionality
Stable With Ceramic Capacitors With Appropriate ESR
Low External Component Count
Thermal Shutdown

The LP2996-N and LP2996A linear regulators are designed to meet the JEDEC SSTL-2 specifications for termination of DDR-SDRAM. The device also supports DDR2, while LP2996A supports DDR3 and DDR3L VTT bus termination with V_DDQ minimum of 1.35 V. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5-A continuous current and transient peaks up to 3 A in the application as required for DDR-SDRAM termination. The LP2996-N and LP2996A also incorporate a VSENSE pin to provide superior load regulation and a VREF output as a reference for the chipset and DIMMs.

An additional feature found on the LP2996-N and LP2996A is an active-low shutdown (SD) pin that provides Suspend To RAM (STR) functionality. When SD is pulled low the VTT output will tri-state providing a high impedance output, but VREF remains active. A power savings advantage can be obtained in this mode through lower quiescent current.

TI recommends the LP2998 and LP2998-Q1 devices for automotive applications and DDR applications that require operating at temperatures below zero.

WEBENCH^® design tools can be used by application designers to generate, optimize, and simlulate applications using the LP2998 and LP2998-Q1.

The LP2996-N and LP2996A linear regulators are designed to meet the JEDEC SSTL-2 specifications for termination of DDR-SDRAM. The device also supports DDR2, while LP2996A supports DDR3 and DDR3L VTT bus termination with V_DDQ minimum of 1.35 V. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5-A continuous current and transient peaks up to 3 A in the application as required for DDR-SDRAM termination. The LP2996-N and LP2996A also incorporate a VSENSE pin to provide superior load regulation and a VREF output as a reference for the chipset and DIMMs.

An additional feature found on the LP2996-N and LP2996A is an active-low shutdown (SD) pin that provides Suspend To RAM (STR) functionality. When SD is pulled low the VTT output will tri-state providing a high impedance output, but VREF remains active. A power savings advantage can be obtained in this mode through lower quiescent current.

TI recommends the LP2998 and LP2998-Q1 devices for automotive applications and DDR applications that require operating at temperatures below zero.

WEBENCH^® design tools can be used by application designers to generate, optimize, and simlulate applications using the LP2998 and LP2998-Q1.

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顶层文档	类型	标题	格式选项	下载最新的英语版本		日期
*	数据表	LP2996/LP2996A DDR Termination Regulator 数据表 (Rev. K)	PDF \| HTML			2016-12-23
	应用手册	Limiting DDR Termination Regulators’ Inrush Current				2016-8-23