LMH0036
- Supports SMPTE 259M (C) Serial Digital Video Standard
- Supports 270 Mbps Serial Data Rate Operation
- Supports DVB-ASI at 270 Mbps
- Single 3.3V Supply Operation
- 360 mW Typical Power Consumption
- Integrated 4:1 Multiplexed Input
- Two Differential, Reclocked Outputs
- Choice of Second Reclocked Output or Low-Jitter, Differential, Data-Rate Clock Output
- Single 27 MHz External Crystal or Reference Clock Input
- Lock Detect Indicator Output
- Output Mute Function for Data and Clock
- Auto/Manual Reclocker Bypass
- Differential LVPECL Compatible Serial Data Inputs and Outputs
- LVCMOS Control Inputs and Indicator Outputs
- 48-Pin WQFN Package
- Industrial Temperature Range: -40°C to +85°C
- Footprint Compatible with the LMH0056 and LMH0356
All trademarks are the property of their respective owners.
The LMH0036 SD SDI Reclocker with 4:1 Input Multiplexer retimes serial digital video data conforming to the SMPTE 259M (C) standard. The LMH0036 operates at the serial data rate of 270 Mbps, and also supports DVB-ASI operation at 270 Mbps. The LMH0036 includes an integrated 4:1 input multiplexer for selecting one of four input data streams for retiming.
The LMH0036 retimes the incoming data to suppress accumulated jitter. The LMH0036 recovers the serial data-rate clock and optionally provides it as an output. The LMH0036 has two differential serial data outputs; the second output may be selected as a low-jitter, data-rate clock output. Controls and indicators are: serial clock or second serial data output select, manual rate select input, SD indicator output, lock detect output, auto/manual data bypass, and output mute. The serial data inputs, outputs, and serial data-rate clock outputs are differential LVPECL compatible. The CML serial data and serial data-rate clock outputs are suitable for driving 100Ω differentially terminated networks. The control logic inputs and outputs are LVCMOS compatible.
The LMH0036 is powered from a single 3.3V supply. Power dissipation is typically 360 mW. The device is housed in a 48-pin WQFN package.
技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | LMH0036 SD SDI Reclocker with 4:1 Input Multiplexer 数据表 (Rev. B) | 2013-4-15 | |||
| 选择指南 | Broadcast and Professional Video Interface Solutions (Rev. E) | PDF | HTML | 2017-4-5 | |||
| 应用手册 | AN-2145 Power Considerations for SDI Products (Rev. B) | 2013-4-26 | ||||
| 应用手册 | AN-2146 Power Design for SDI and Other Noise-Sensitive Devices (Rev. A) | 2013-4-26 | ||||
| 应用手册 | AN-1943 Understanding Serial Digital Video Bit Rates (Rev. A) | 2013-4-26 | ||||
| 应用手册 | Replacing the CLC014 Adaptive Cable Equalizer with the LMH0074 (Rev. A) | 2013-4-26 | ||||
| 应用手册 | Replacing the CLC012 Adaptive Cable Equalizer with the LMH0074 (Rev. A) | 2013-4-26 | ||||
| 应用手册 | High-Speed Board Layout Challenges in FPGA/SDI Sub-Systems | 2009-11-12 | ||||
| 应用手册 | Reference Clock Loop Through Application | 2009-1-16 | ||||
| 设计指南 | Broadcast Video Owner's Manual | 2006-11-17 |
设计与开发
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| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| WQFN (RHS) | 48 | Ultra Librarian |