DS36954

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四路差分总线收发器

产品详情

Number of receivers 4 Number of transmitters 4 Duplex Half Signaling rate (max) (Mbps) 20 IEC 61000-4-2 contact (±V) None Fault protection (V) -10 to 15 Common-mode range (V) -7 to 12 Number of nodes 32 Isolated No Supply current (max) (µA) 500 Rating Catalog Operating temperature range (°C) 0 to 70
Number of receivers 4 Number of transmitters 4 Duplex Half Signaling rate (max) (Mbps) 20 IEC 61000-4-2 contact (±V) None Fault protection (V) -10 to 15 Common-mode range (V) -7 to 12 Number of nodes 32 Isolated No Supply current (max) (µA) 500 Rating Catalog Operating temperature range (°C) 0 to 70
SOIC (DW) 20 131.84 mm² (12.8 mm × 10.3 mm)
  • Pinout for SCSI Interface
  • Compact 20-Pin PLCC or SOIC Package
  • Meets EIA-485 Standard for Multipoint Bus Transmission
  • Greater than 60 mA Source/Sink Currents
  • Thermal Shutdown Protection
  • Glitch-Free Driver Outputs on Power Up and Down

All trademarks are the property of their respective owners.

  • Pinout for SCSI Interface
  • Compact 20-Pin PLCC or SOIC Package
  • Meets EIA-485 Standard for Multipoint Bus Transmission
  • Greater than 60 mA Source/Sink Currents
  • Thermal Shutdown Protection
  • Glitch-Free Driver Outputs on Power Up and Down

All trademarks are the property of their respective owners.

The DS36954 is a low power, quad EIA-485 differential bus transceiver especially suited for high speed, parallel, multipoint, I/O bus applications. A compact 20-pin surface mount PLCC or SOIC package provides high transceiver integration and a very small PC board footprint.

Propagation delay skew between devices is specified to aid in parallel interface designs—limits on maximum and minimum delay times are verified.

Five devices can implement a complete SCSI initiator or target interface. Three transceivers in a package are pinned out for data bus connections. The fourth transceiver, with the flexibility provided by its individual enables, can serve as a control bus transceiver.

The DS36954 is a low power, quad EIA-485 differential bus transceiver especially suited for high speed, parallel, multipoint, I/O bus applications. A compact 20-pin surface mount PLCC or SOIC package provides high transceiver integration and a very small PC board footprint.

Propagation delay skew between devices is specified to aid in parallel interface designs—limits on maximum and minimum delay times are verified.

Five devices can implement a complete SCSI initiator or target interface. Three transceivers in a package are pinned out for data bus connections. The fourth transceiver, with the flexibility provided by its individual enables, can serve as a control bus transceiver.

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 DS36954 Quad Differential Bus Transceiver 数据表 (Rev. C) 2013-4-22

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