CDCLVC1110
- High-Performance 1:2, 1:3, 1:4, 1:6, 1:8, 1:10, 1:12 LVCMOS Clock Buffer Family
- Very Low Pin-to-Pin Skew < 50 ps
- Very Low Additive Jitter < 100 fs
- Supply Voltage: 3.3 V or 2.5 V
- fmax = 250 MHz for 3.3 V
fmax = 180 MHz for 2.5 V - Operating Temperature Range: –40°C to 85°C
- Available in 8-, 14-, 16-, 20-, 24-Pin TSSOP Package (All Pin-Compatible)
The CDCLVC11xx is a modular, high-performance, low-skew, general-purpose clock buffer family from Texas Instruments.
The entire family is designed with a modular approach in mind. It is intended to round up TI’s series of LVCMOS clock generators.
Seven different fan-out variations, 1:2 to 1:12, are available. All of the devices are pin-compatible to each other for easy handling.
All family members share the same high performing characteristics such as low additive jitter, low skew, and wide operating temperature range.
The CDCLVC11xx supports an asynchronous output enable control (1G) which switches the outputs into a low state when 1G is low.
The CDCLVC11xx family operates in a 2.5-V and
3.3-V environment and are characterized for operation from –40°C
to 85°C.
技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | CDCLVC11xx 3.3-V and 2.5-V LVCMOS High-Performance Clock Buffer Family 数据表 (Rev. B) | PDF | HTML | 2017-2-24 | ||
| 应用手册 | 使用时钟缓冲器进行正弦波-方波转换 | PDF | HTML | 英语版 | PDF | HTML | 2024-9-4 | |
| 应用手册 | How to Apply 1.8-V Signals to 3.3-V CDCLVC11xx Fanout Clock Buffer | 2010-11-30 |
设计与开发
如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。
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| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| TSSOP (PW) | 20 | Ultra Librarian |
订购和质量
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