CDCEL913-Q1

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具有 1.8V LVCMOS 输出的汽车类可编程 1-PLL VCXO 时钟合成器

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数据表

document-pdfAcrobat CDCE913-Q1 and CDCEL913-Q1 Programmable 1-PLL VCXO Clock Synthesizer s With 1.8V, 2.5V, and 3.3V Outputs 数据表 (Rev. E) (英语) PDF | HTML

CDCEL913-Q1

正在供货

数据表

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产品详情

Number of outputs

3

Output type

LVCMOS

Output frequency (max) (MHz)

230

Core supply voltage (V)

1.8

Output supply voltage (V)

1.8

Input type

LVCMOS, XTAL

Operating temperature range (°C)

-40 to 85

Features

I2C, Integrated EEPROM, Multiplier or divider, Spread-spectrum clocking (SSC)

Rating

Automotive

Number of outputs

3

Output type

LVCMOS

Output frequency (max) (MHz)

230

Core supply voltage (V)

1.8

Output supply voltage (V)

1.8

Input type

LVCMOS, XTAL

Operating temperature range (°C)

-40 to 85

Features

I2C, Integrated EEPROM, Multiplier or divider, Spread-spectrum clocking (SSC)

Rating

Automotive

TSSOP (PW)

14

32 mm² (5 mm × 6.4 mm)

Qualified for automotive applications
AEC-Q100 qualified with the following results:
- Device temperature grades
  - Grade 1 For CDCE913-Q1: –40°C to +125°C ambient operating temperature
  - Grade 3 For CDCEL913-Q1: –40°C to +85°C ambient operating temperature
- Device HBM ESD classification level H2
- Device CDM ESD classification level C6
Functional Safety-Capable
- Documentation available to aid functional safety system design
In-system programmability and EEPROM
- Serial programmable volatile register
- Nonvolatile EEPROM to store customer settings
Flexible input clocking concept
- External crystal: 8MHz to 32MHz
- On-chip VCXO: pull range ±150ppm
- Single-ended LVCMOS up to 160MHz
Free selectable output frequency up to 230MHz
Low-noise PLL core
- PLL loop filter components integrated
- Low period jitter (typical 50ps)
Separate output supply pins:
- CDCE913-Q1: 3.3V and 2.5V
- CDCEL913-Q1: 1.8V
Flexible clock driver
- Three user-definable control inputs [S0, S1, S2], for example, SSC selection, frequency switching, output enable, or power down
- Generates highly accurate clocks for video, audio, USB, IEEE1394, RFID, Bluetooth, WLAN, Ethernet, and GPS
- Generates common clock frequencies used with TI- DaVinci™, OMAP™, DSPs
- Programmable SSC modulation
- Enables 0-PPM clock generation
1.8V device power supply
Packaged in TSSOP
Development and programming kit for easy PLL design and programming (TI Pro-Clock™)

Qualified for automotive applications
AEC-Q100 qualified with the following results:
- Device temperature grades
  - Grade 1 For CDCE913-Q1: –40°C to +125°C ambient operating temperature
  - Grade 3 For CDCEL913-Q1: –40°C to +85°C ambient operating temperature
- Device HBM ESD classification level H2
- Device CDM ESD classification level C6
Functional Safety-Capable
- Documentation available to aid functional safety system design
In-system programmability and EEPROM
- Serial programmable volatile register
- Nonvolatile EEPROM to store customer settings
Flexible input clocking concept
- External crystal: 8MHz to 32MHz
- On-chip VCXO: pull range ±150ppm
- Single-ended LVCMOS up to 160MHz
Free selectable output frequency up to 230MHz
Low-noise PLL core
- PLL loop filter components integrated
- Low period jitter (typical 50ps)
Separate output supply pins:
- CDCE913-Q1: 3.3V and 2.5V
- CDCEL913-Q1: 1.8V
Flexible clock driver
- Three user-definable control inputs [S0, S1, S2], for example, SSC selection, frequency switching, output enable, or power down
- Generates highly accurate clocks for video, audio, USB, IEEE1394, RFID, Bluetooth, WLAN, Ethernet, and GPS
- Generates common clock frequencies used with TI- DaVinci™, OMAP™, DSPs
- Programmable SSC modulation
- Enables 0-PPM clock generation
1.8V device power supply
Packaged in TSSOP
Development and programming kit for easy PLL design and programming (TI Pro-Clock™)

The CDCE913-Q1 and CDCEL913-Q1 devices are modular, phase-locked loop (PLL)-based programmable clock synthesizers. These devices provide flexible and programmable options, such as output clocks, input signals, and control pins, so that the user can configure the CDCE913-Q1 and CDCEL913-Q1 for their own specifications.

The CDCE913-Q1 and CDCEL913-Q1 generate up to three output clocks from a single input frequency to enable both board space and cost savings. Additionally, with multiple outputs, the clock generator can replace multiple crystals with one clock generator. This makes the device well-suited for head unit and telematics applications in infotainment and camera systems in ADAS, as these platforms are evolving into smaller and more cost effective systems.

Also, each output can be programmed in-system for any clock frequency up to 230MHz through the integrated, configurable PLL. The PLL also supports spread-spectrum clocking (SSC) with programmable down and center spread. This provides better electromagnetic interference (EMI) performance to enable customers to pass industry standards such as CISPR-25.

Customization of frequency programming and SSC are accessed using three, user-defined control pins. This eliminates the need to use an additional interface to control the clock. Specific power-up and power-down sequences can also be defined to the user’s needs.

The CDCE913-Q1 and CDCEL913-Q1 devices are modular, phase-locked loop (PLL)-based programmable clock synthesizers. These devices provide flexible and programmable options, such as output clocks, input signals, and control pins, so that the user can configure the CDCE913-Q1 and CDCEL913-Q1 for their own specifications.

The CDCE913-Q1 and CDCEL913-Q1 generate up to three output clocks from a single input frequency to enable both board space and cost savings. Additionally, with multiple outputs, the clock generator can replace multiple crystals with one clock generator. This makes the device well-suited for head unit and telematics applications in infotainment and camera systems in ADAS, as these platforms are evolving into smaller and more cost effective systems.

Also, each output can be programmed in-system for any clock frequency up to 230MHz through the integrated, configurable PLL. The PLL also supports spread-spectrum clocking (SSC) with programmable down and center spread. This provides better electromagnetic interference (EMI) performance to enable customers to pass industry standards such as CISPR-25.

Customization of frequency programming and SSC are accessed using three, user-defined control pins. This eliminates the need to use an additional interface to control the clock. Specific power-up and power-down sequences can also be defined to the user’s needs.

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顶层文档	类型	标题	格式选项	日期
*	数据表	CDCE913-Q1 and CDCEL913-Q1 Programmable 1-PLL VCXO Clock Synthesizer s With 1.8V, 2.5V, and 3.3V Outputs 数据表 (Rev. E)	PDF \| HTML	2024-8-22
	应用手册	Crystal or Crystal Oscillator Replacement with Silicon Devices		2014-6-18
	应用手册	VCXO Application Guideline for CDCE(L)9xx Family (Rev. A)		2012-4-23
	应用手册	General I2C / EEPROM usage for the CDCE(L)9xx family		2010-1-26
	应用手册	Troubleshooting I2C Bus Protocol		2009-10-19
	应用手册	Usage of I2C for CDCE(L)949, CDCE(L)937, CDCE(L)925, CDCE(L)913		2009-9-23
	应用手册	Generating Low Phase-Noise Clocks for Audio Data Converters from Low Frequency		2008-3-31

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封装	引脚	CAD 符号、封装和 3D 模型
TSSOP (PW)	14	Ultra Librarian

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CDCEL913-Q1

具有 1.8V LVCMOS 输出的汽车类可编程 1-PLL VCXO 时钟合成器

CDCEL913-Q1

产品详情

技术文档

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