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CD4078B

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CMOS 8 输入或非/或门

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CD4078B

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产品详情

Technology family CD4000 Number of channels 1 Inputs per channel 8 IOL (max) (mA) 6.8 IOH (max) (mA) -6.8 Input type Standard CMOS Output type Push-Pull Features Standard speed (tpd > 50ns) Data rate (max) (Mbps) 8 Rating Catalog Operating temperature range (°C) -55 to 125
Technology family CD4000 Number of channels 1 Inputs per channel 8 IOL (max) (mA) 6.8 IOH (max) (mA) -6.8 Input type Standard CMOS Output type Push-Pull Features Standard speed (tpd > 50ns) Data rate (max) (Mbps) 8 Rating Catalog Operating temperature range (°C) -55 to 125
PDIP (N) 14 181.42 mm² (19.3 mm × 9.4 mm) SOP (NS) 14 79.56 mm² (10.2 mm × 7.8 mm) SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm) TSSOP (PW) 14 32 mm² (5 mm × 6.4 mm)
  • Medium-Speed Operation:
    tPHL, tPLH = 75 ns (typ.) at VDD = 10 V
  • Buffered inputs and output
  • 5-V, 10-V, and 15-V parametric ratings
  • Standardized symmetrical output characteristics
  • 100% tested for quiescent current at 20 V
  • Maximum input current of 1 µA at 28 V over full package-temperature range:
    100 nA at 18 V and 25°C
  • Noise margin (over full package-temperature range):
    • 1 V at VDD = 5 V
    • 2 V at VDD = 10 V
    • 2.5 V at VDD = 15 V
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
  • Medium-Speed Operation:
    tPHL, tPLH = 75 ns (typ.) at VDD = 10 V
  • Buffered inputs and output
  • 5-V, 10-V, and 15-V parametric ratings
  • Standardized symmetrical output characteristics
  • 100% tested for quiescent current at 20 V
  • Maximum input current of 1 µA at 28 V over full package-temperature range:
    100 nA at 18 V and 25°C
  • Noise margin (over full package-temperature range):
    • 1 V at VDD = 5 V
    • 2 V at VDD = 10 V
    • 2.5 V at VDD = 15 V
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"

CD4078B NOR/OR Gate provides the system designer with direct implementation of the positive-logic 8-input NOR and OR functions and supplements the existing family of CMOS gates.

The CD4078B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shink small-outline packages (PW and PWR suffixes).

CD4078B NOR/OR Gate provides the system designer with direct implementation of the positive-logic 8-input NOR and OR functions and supplements the existing family of CMOS gates.

The CD4078B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shink small-outline packages (PW and PWR suffixes).
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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 CD4078B TYPES 数据表 (Rev. C) 2003-8-21
应用手册 Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics 2001-12-3

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PDIP (N) 14 Ultra Librarian
SOP (NS) 14 Ultra Librarian
SOIC (D) 14 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian
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