ADS5485
- 170/200-MSPS Sample Rates
- 16-Bit Resolution, 78 dBFS Noise Floor
- SFDR = 95 dBc
- On-Chip High Impedance Analog Buffer
- Efficient DDR LVDS-Compatible Outputs
- Power-Down Mode: 70 mW
- Pin-for-Pin with ADS5483/5482/5481, 135/105/80-MSPS ADCs
- QFN-64 PowerPAD Package (9 mm × 9 mm footprint)
- Industrial Temperature Range: –40°C to 85°C
- APPLICATIONS
- Wireless Infrastructure
- Test and Measurement Instrumentation
- Software-Defined Radio
- Data Acquisition
- Power Amplifier Linearization
- Radar
- Medical Imaging
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The ADS5484/ADS5485 (ADS548x) is a 16-bit family of analog-to-digital converters (ADCs) that operate from both a 5-V supply and 3.3-V supply while providing LVDS-compatible digital outputs. The ADS548x integrated analog input buffer isolates the internal switching of the onboard track and hold (T & H) from disturbing the signal source while providing a high-impedance input. An internal reference generator is provided to simplify the system design. Internal dither is available to improve SFDR. These devices are drop-in compatible to the ADS5483/5482/5481, creating a pin-compatible family from 80 – 200 MSPS. Designed for highest total ENOB, the ADS548x family has outstanding low noise performance and spurious-free dynamic range.
The ADS548x family is available in a QFN-64 PowerPAD package. The devices are built on Texas Instruments complementary bipolar process (BiCom3) and are specified over the full industrial temperature range (–40°C to 85°C).
技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | 16-Bit, 170/200-MSPS Analog-to-Digital Converters 数据表 (Rev. C) | 2009-10-8 | |||
| 应用手册 | Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) | 2015-5-22 | ||||
| 应用手册 | Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) | 2013-7-19 | ||||
| 应用手册 | High-Speed, Analog-to-Digital Converter Basics | 2012-1-11 | ||||
| 应用手册 | Input Impedance Measurement Using ADC FFT Data | 2011-1-11 | ||||
| 应用手册 | Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) | 2010-9-10 | ||||
| 应用手册 | Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio | 2009-4-28 | ||||
| 应用手册 | CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters | 2008-6-8 | ||||
| 应用手册 | Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 | 2008-6-2 | ||||
| 应用手册 | QFN Layout Guidelines | 2006-7-28 |
设计与开发
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|---|---|---|
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