ADS5423
- 14 Bit Resolution
- 80 MSPS Maximum Sample Rate
- SNR = 74 dBc at 80 MSPS and 50 MHz IF
- SFDR = 94 dBc at 80 MSPS and 50 MHz IF
- 2.2 Vpp Differential Input Range
- 5 V Supply Operation
- 3.3 V CMOS Compatible Outputs
- 1.85 W Total Power Dissipation
- 2s Complement Output Format
- On-Chip Input Analog Buffer, Track and Hold, and Reference Circuit
- 52 Pin HTQFP Package With Exposed Heatsink
- Pin Compatible to the AD6644/45
- Industrial Temperature Range = -40°C to 85°C
- APPLICATIONS
- Single and Multichannel Digital Receivers
- Base Station Infrastructure
- Instrumentation
- Video and Imaging
- RELATED DEVICES
- Clocking: CDC7005
- Amplifiers: OPA695, THS4509
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The ADS5423 is a 14 bit 80 MSPS analog-to-digital converter (ADC) that operates from a 5 V supply, while providing 3.3 V CMOS compatible digital outputs. The ADS5423 input buffer isolates the internal switching of the on-chip Track and Hold (T&H) from disturbing the signal source. An internal reference generator is also provided to further simplify the system design. The ADS5423 has outstanding low noise and linearity, over input frequency. With only a
2.2 VPP input range, simplifies the design of multicarrier applications, where the carriers are selected on the digital domain.
The ADS5423 is available in a 52 pin HTQFP with heatsink package and is pin compatible to the AD6645. The ADS5423 is built on state of the art Texas Instruments complementary bipolar process (BiCom3) and is specified over full industrial temperature range (-40°C to 85°C).
技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | ADS5423: 14-Bit 80 MSPS ADC 数据表 (Rev. A) | 2010-1-14 | |||
| 应用手册 | Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) | 2015-5-22 | ||||
| 应用手册 | Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) | 2013-7-19 | ||||
| 应用手册 | High-Speed, Analog-to-Digital Converter Basics | 2012-1-11 | ||||
| 应用手册 | Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) | 2010-9-10 | ||||
| 应用手册 | Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio | 2009-4-28 | ||||
| 应用手册 | CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters | 2008-6-8 | ||||
| 应用手册 | Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 | 2008-6-2 | ||||
| 模拟设计期刊 | Clocking High-Speed Data Converters | 2005-1-18 |
设计与开发
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