ADS5421
- HIGH DYNAMIC RANGE:
High SFDR: 83dB at 10MHz fIN
High SNR: 75dB at 10MHz fIN - ON-BOARD TRACK-AND-HOLD:
Differential Inputs
Selectable Full-Scale Input Range - LOW POWER: 850mW
- FLEXIBLE CLOCKING:
Differential or Single-Ended
Accepts Sine or Square Wave Clocking Down to 0.5VPP
Variable Threshold Level - APPLICATIONS
- COMMUNICATIONS RECEIVERS
- TEST INSTRUMENTATION
- PROFESSIONAL CCD IMAGING
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The ADS5421 is a high-dynamic range 14-bit, 40MHz, pipelined Analog-to-Digital Converter (ADC). It includes a high-bandwidth linear track-and-hold amplifier that gives excellent spurious performance up to and beyond the Nyquist rate. The clock input can accept a low-level differential sine wave or square wave signal down to 0.5VPP, further improving the Signal-to-Noise Ratio (SNR) performance.
The ADS5421 has a 4VPP differential input range (2VPP • 2 inputs) for optimum Spurious-Free Dynamic Range (SFDR). The differential operation gives the lowest even-order harmonic components. A lower input voltage can also be selected using the internal references, further optimizing SFDR.
The ADS5421 is available in a small LQFP-64 package.
技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | 14-Bit, 40MHz Sampling Analog-to-Digital Converter 数据表 (Rev. E) | 2005-6-22 | |||
| 应用手册 | Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) | 2015-5-22 | ||||
| 应用手册 | Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) | 2013-7-19 | ||||
| 应用手册 | High-Speed, Analog-to-Digital Converter Basics | 2012-1-11 | ||||
| 应用手册 | Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) | 2010-9-10 | ||||
| 应用手册 | Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio | 2009-4-28 | ||||
| 应用手册 | CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters | 2008-6-8 | ||||
| 应用手册 | Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 | 2008-6-2 |
设计与开发
如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。
ADC-HARMONIC-CALC — ADC Frequency Calculator Download
ADC 谐波计算工具是基于 excel 的计算器，用于确定当模数转换器中出现奈奎斯特混叠后高次谐波的频率空间的位置。
如果给定 ADC 采样速率和有用信号的范围，该计算器可以确定第 2 至第 9 谐波是否会返送到有用信号的频带中。图表以图形方式显示了在出现奈奎斯特混叠后基本信号以及第 2 至第 9 谐波的位置。
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
模拟工程师计算器旨在加快模拟电路设计工程师经常运用的许多重复性计算。该基于 PC 的工具提供图形界面，其中显示各种常见计算列表，从使用反馈电阻器设置运算放大器增益到选择合适的电路设计元件，以稳定模数转换器 (ADC) 驱动器缓冲器电路。
除了可用作独立工具之外，该计算器还能很好地与模拟工程师口袋参考中所述的概念配合使用。
JITTER-SNR-CALC — Jitter and SNR calculator
JITTER-SNR-CALC 可用于根据输入频率和时钟抖动来计算 ADC 的理论信噪比 (SNR) 性能。
SBAC119 — TIGAR (Texas Instruments Graphical Evaluation of ADC Response Tool)
| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| LQFP (PM) | 64 | Ultra Librarian |