ADS5271

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八通道、12 位、50MSPS 模数转换器 (ADC)

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数据表

document-pdfAcrobat 8-Channel, 12-Bit, 50MSPS Analog-to-Digital Converter with Serial LVDS Interface 数据表 (Rev. C) (英语)

ADS5271

正在供货

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产品详情

Sample rate (max) (Msps)

50

Resolution (Bits)

12

Number of input channels

8

Interface type

Parallel LVDS

Analog input BW (MHz)

300

Features

Low Power

Rating

Catalog

Peak-to-peak input voltage range (V)

2

Power consumption (typ) (mW)

957

Architecture

Pipeline

SNR (dB)

70.5

ENOB (Bits)

11.3

SFDR (dB)

87

Operating temperature range (°C)

-40 to 85

Input buffer

No

Sample rate (max) (Msps)

50

Resolution (Bits)

12

Number of input channels

8

Interface type

Parallel LVDS

Analog input BW (MHz)

300

Features

Low Power

Rating

Catalog

Peak-to-peak input voltage range (V)

2

Power consumption (typ) (mW)

957

Architecture

Pipeline

SNR (dB)

70.5

ENOB (Bits)

11.3

SFDR (dB)

87

Operating temperature range (°C)

-40 to 85

Input buffer

No

HTQFP (PFP)

80

196 mm² (14 mm × 14 mm)

Maximum Sample Rate: 50MSPS
12-Bit Resolution
No Missing Codes
Total Power Dissipation:
Internal Reference: 927mW
External Reference: 861mW
CMOS Technology
Simultaneous Sample-and-Hold
70.5dB SNR at 10MHz IF
3.3V Digital/Analog Supply
Serialized LVDS Outputs
Integrated Frame and Bit Patterns
Option to Double LVDS Clock Output Currents
Four Current Modes for LVDS
Pin- and Format-Compatible Family
TQFP-80 PowerPAD Package
APPLICATIONS
- Portable Ultrasound Systems
- Tape Drives
- Test Equipment
- Optical Networking

PowerPAD Is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners

Maximum Sample Rate: 50MSPS
12-Bit Resolution
No Missing Codes
Total Power Dissipation:
Internal Reference: 927mW
External Reference: 861mW
CMOS Technology
Simultaneous Sample-and-Hold
70.5dB SNR at 10MHz IF
3.3V Digital/Analog Supply
Serialized LVDS Outputs
Integrated Frame and Bit Patterns
Option to Double LVDS Clock Output Currents
Four Current Modes for LVDS
Pin- and Format-Compatible Family
TQFP-80 PowerPAD Package
APPLICATIONS
- Portable Ultrasound Systems
- Tape Drives
- Test Equipment
- Optical Networking

PowerPAD Is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners

The ADS5271 is a high-performance, 50MSPS, 8-channel analog-to-digital converter (ADC). Internal references are provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size.

An integrated phase lock loop (PLL) multiplies the incoming ADC sampling clock by a factor of 12. This high-frequency LVDS clock is used in the data serialization and transmission process. The word output of each internal ADC is serialized and transmitted either MSB or LSB first. In addition to the eight data outputs, a bit clock and a word clock are also transmitted. The bit clock is at 6x the speed of the sampling clock, whereas the word clock is at the same speed of the sampling clock.

The ADS5271 provides internal references, or can optionally be driven with external references. Best performance is achieved through the internal reference mode.

The device is available in a TQFP-80 PowerPAD package and is specified over a -40°C to +85°C operating range.

The ADS5271 is a high-performance, 50MSPS, 8-channel analog-to-digital converter (ADC). Internal references are provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size.

An integrated phase lock loop (PLL) multiplies the incoming ADC sampling clock by a factor of 12. This high-frequency LVDS clock is used in the data serialization and transmission process. The word output of each internal ADC is serialized and transmitted either MSB or LSB first. In addition to the eight data outputs, a bit clock and a word clock are also transmitted. The bit clock is at 6x the speed of the sampling clock, whereas the word clock is at the same speed of the sampling clock.

The ADS5271 provides internal references, or can optionally be driven with external references. Best performance is achieved through the internal reference mode.

The device is available in a TQFP-80 PowerPAD package and is specified over a -40°C to +85°C operating range.

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顶层文档	类型	标题	日期
*	数据表	8-Channel, 12-Bit, 50MSPS Analog-to-Digital Converter with Serial LVDS Interface 数据表 (Rev. C)	2009-1-6
	应用手册	Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)	2015-5-22
	应用手册	Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)	2013-7-19
	应用手册	Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)	2010-9-10
	应用手册	Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio	2009-4-28
	应用手册	CDCE62005 as Clock Solution for High-Speed ADCs	2008-9-4
	应用手册	CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters	2008-6-8
	应用手册	Phase Noise Performance and Jitter Cleaning Ability of CDCE72010	2008-6-2
	应用手册	Interfacing the VCA8613 with High-Speed ADCs	2005-4-5
	应用手册	Interfacing the VCA8617 with High-Speed ADCs	2005-4-5
	应用手册	Interfacing High-Speed LVDS Outputs of the ADS527x/ADS524x	2005-2-23
	应用手册	Using the ADSDeSer-50EVM to Deserialize ADS527x 10-Bit Outputs	2004-7-8
	应用手册	LVDS Outputs on the ADS527x	2004-6-10