SN74AUP1G17
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model
(A114-B, Class II) - 1000-V Charged-Device Model (C101)
- 2000-V Human-Body Model
- Available in the Texas Instruments NanoStar™ Package
- Low Static-Power Consumption
(ICC = 0.9 µA Maximum) - Low Dynamic-Power Consumption
(Cpd = 4.4 pF Typical at 3.3 V) - Low Input Capacitance (Ci = 1.5 pF Typical)
- Low Noise – Overshoot and Undershoot
<10% of VCC - Ioff Supports Partial-Power-Down Mode Operation
- Includes Schmitt-Trigger Inputs
- Wide Operating VCC Range of 0.8 V to 3.6 V
- Optimized for 3.3-V Operation
- 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
- tpd = 5.1 ns Maximum at 3.3 V
- Suitable for Point-to-Point Applications
The AUP family of devices is TIs premier solution to the industrys low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in increased battery life. This product also maintains excellent signal integrity (see AUP – The Lowest-Power Family and Excellent Signal Integrity).
This device functions as an independent gate with Schmitt-trigger inputs, which allows for slow input transition and better switching-noise immunity at the input.
NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.
관심 가지실만한 유사 제품
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기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 |
|---|---|---|---|---|---|
| * | 데이터 시트 | SN74AUP1G17 Low-Power Single Schmitt-Trigger Buffer datasheet (Rev. J) | PDF | HTML | 2017. 9. 29 | |
| Application brief | Understanding Schmitt Triggers (Rev. B) | PDF | HTML | 2025. 4. 17 | ||
| Application brief | Debounce a Switch | PDF | HTML | 2020. 10. 8 | ||
| 애플리케이션 노트 | Designing and Manufacturing with TI's X2SON Packages | 2017. 8. 23 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
5-8-LOGIC-EVM — 5핀~8핀 DCK, DCT, DCU, DRL 및 DBV 패키지용 일반 논리 평가 모듈
5-8-NL-LOGIC-EVM — 5-8핀 DPW, DQE, DRY, DSF, DTM, DTQ 및 DTT 패키지를 지원하는 일반 로직 및 변환 EVM
DTT, DRY, DPW, DTM, DQE, DQM, DSF 또는 DTQ 패키지가 있는 로직 또는 변환 디바이스를 지원하도록 설계된 일반 EVM. 보드 설계는 유연한 평가가 가능합니다.
TIDA-00268 — Thunderbolt™ 단일 포트 주변 장치 레퍼런스 디자인
The TI Thunderbolt™ Single Port Peripheral reference design is optimized for Thunderbolt 2 systems which have a bandwidth of 20Gbps. The design utilizes the TPS65980 power management unit to reduce the BOM cost up to 50% and reduce the area about 40% over a discrete implementation. This (...)
TIDA-00377 — MOSFET를 지원하는 자체 전원 AC 고체 상태 릴레이 레퍼런스 디자인
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| DSBGA (YFP) | 4 | Ultra Librarian |
| X2SON (DPW) | 5 | Ultra Librarian |
| SOT-5X3 (DRL) | 5 | Ultra Librarian |
| SOT-SC70 (DCK) | 5 | Ultra Librarian |
| X2SON (DSF) | 6 | Ultra Librarian |
| SOT-23 (DBV) | 5 | Ultra Librarian |
| USON (DRY) | 6 | Ultra Librarian |
| DSBGA (YZP) | 5 | Ultra Librarian |